a 4-pipeline riscv soc ( included core, periph), based with rv32im ,designed by verilog
☆24Jul 20, 2023Updated 2 years ago
Alternatives and similar repositories for ritter-soc
Users that are interested in ritter-soc are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- A 32 bit RISCV Based SOC with QSpi , Uart and 8 bit SDRAM Controller tagetted to efebless shuttle program☆21Mar 22, 2023Updated 3 years ago
- A small test SoC for various soft-CPUs (Cortex-M0, RISC-V)☆34Mar 21, 2020Updated 6 years ago
- Mini RISC-V SOC☆12Nov 13, 2015Updated 10 years ago
- Kernel module that makes it possible to create virtual wifi devices each with a virtualized stack.☆11Dec 13, 2011Updated 14 years ago
- Example of Chisel3 Diplomacy☆11Feb 23, 2022Updated 4 years ago
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- We are planning to create an open-source vinyl cutter/plotter. Matrix chat room: https://matrix.to/#/!MwdoqdFeJDUPgWIzKZ:matrix.org?via=m…☆11Apr 24, 2021Updated 4 years ago
- Linux-capable superscalar out-of-order RISC core (with Cache& MMU) and SoC, having been verified on Xilinx Kintex-7 FPGA.☆55Aug 14, 2024Updated last year
- ☆10Feb 27, 2020Updated 6 years ago
- A classic five stage pipelined processor☆13Mar 13, 2024Updated 2 years ago
- みんなのSystemVerilog☆19May 12, 2022Updated 3 years ago
- DDR3 SDRAM Memory Controller Design & Synthesis using System Verilog☆32Nov 6, 2018Updated 7 years ago
- Social Disatancing Monitor using yolov3 and DPU HW acceleration for Xilinx adaptive computing challenge 2020☆12Feb 17, 2023Updated 3 years ago
- Alternative compiler for the J1B embedded CPU☆15Oct 31, 2020Updated 5 years ago
- Arduino Uno based signal generator for scientific applications.☆19Sep 24, 2019Updated 6 years ago
- Wordpress hosting with auto-scaling on Cloudways • AdFully Managed hosting built for WordPress-powered businesses that need reliable, auto-scalable hosting. Cloudways SafeUpdates now available.
- BiSUNA framework specialized to compile for the Xilinx Alveo U50☆13Dec 3, 2020Updated 5 years ago
- Demo SoC☆10Oct 17, 2023Updated 2 years ago
- APB Timer Unit☆14Oct 30, 2025Updated 4 months ago
- Zero Gecko 110 quick start breakout board☆20Mar 23, 2014Updated 12 years ago
- ☆13Jan 14, 2021Updated 5 years ago
- Python tools for processing Verilog files☆10Dec 7, 2011Updated 14 years ago
- DSP WishBone Compatible Cores☆14Jul 17, 2014Updated 11 years ago
- Verification IP for Watchdog☆12Apr 6, 2021Updated 4 years ago
- FIR band-pass filter using Verilog HDL.☆13Sep 6, 2020Updated 5 years ago
- Open source password manager - Proton Pass • AdSecurely store, share, and autofill your credentials with Proton Pass, the end-to-end encrypted password manager trusted by millions.
- ☆11Mar 12, 2024Updated 2 years ago
- transplant several overlays to s9_pynq board☆17Oct 31, 2020Updated 5 years ago
- Tutorial☆15Jun 13, 2020Updated 5 years ago
- Verilog+VHDL Hierarchy Management tool ( IDE ) wraps around Vim, runs in Linux terminal window.☆12Jan 15, 2017Updated 9 years ago
- Implementation of a Serial Peripheral Interface(SPI) using Verilog and testing various modes of the SPI Device☆21Jul 7, 2024Updated last year
- DeviceIO是一个驱动框架,用于封装嵌入式HAL驱动,为上层应用提供服务。☆10Jun 1, 2024Updated last year
- A design of 15-order FIR filter using Verilog, with modulation and demodulation system using MATLAB☆10Aug 15, 2020Updated 5 years ago
- EasierUVM from Doulos now written in Python for easier UVM with framework and template generator☆14Sep 28, 2022Updated 3 years ago
- Detection of newly drone devices, characterized by very small size. Proposal of a method that is cheaper and simpler than current methods…☆16Jul 8, 2022Updated 3 years ago
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- This is a uvm example. The video is available at https://www.bilibili.com/video/BV1yq4y177f6/☆49Mar 2, 2022Updated 4 years ago
- Designing means to communicate as an SPI master, being a part of AXI interface☆19Sep 14, 2023Updated 2 years ago
- ☆14Aug 10, 2023Updated 2 years ago
- ☆14Jul 5, 2019Updated 6 years ago
- ☆12Nov 11, 2015Updated 10 years ago
- The Repository contains the code of various Digital Circuits☆12Aug 7, 2023Updated 2 years ago
- ☆22May 10, 2022Updated 3 years ago