Alternatives and similar repositories for BandPassFilter:

Users that are interested in BandPassFilter are comparing it to the libraries listed below

• Divyansh03 / FIR-Filter-in-Verilog
  FIR Filter in Verilog
  ☆12Updated 5 years ago
• Youssefmdany / Design-and-UVM-TB-of-RISC-V-Microprocessor
  Design and UVM-TB of RISC -V Microprocessor
  ☆14Updated 6 months ago
• mnmhdanas / DA-Based-LMS-Adaptive-filter
  Distributed arithmetic (DA) is another way of implementing a dot product where one of the arrays has constant elements. The DA can be eff…
  ☆15Updated 3 years ago
• dineshannayya / yifive_r0
  A 32 bit RISCV Based SOC with QSpi , Uart and 8 bit SDRAM Controller tagetted to efebless shuttle program
  ☆17Updated last year
• MostafaOkasha / ECHO-and-FIR-FILTER-implementation-on-Verilog-HDL
  Verilog HDL implementation of an ECHO machine and an FIR filter that filters out a specific noise. More details provided in individual fi…
  ☆10Updated 5 years ago
• trivedidvijen / SPI-to-I2C-Protocol-Conversion-Using-Verilog
  SPI to I2C Protocol Conversion Using Verilog. Final Year BTech project. Also published an IEEE paper.
  ☆9Updated 3 years ago
• StanfordAHA / AhaM3SoC
  SoC Based on ARM Cortex-M3
  ☆25Updated this week
• xfguo / spi
  SPI Master Core clone from OpenCores
  ☆11Updated 11 years ago
• fengyulin1996 / Verilog-DSP
  FIR，FFT based on Verilog
  ☆13Updated 7 years ago
• AugustinJose1221 / FFTx32
  A 32 point radix-2 FFT module written in Verilog
  ☆21Updated 4 years ago
• abdelazeem201 / ASIC-implementation-of-AES
  Advanced encryption standard (AES) algorithm has been widely deployed in cryptographic applications. This work proposes a low power and h…
  ☆20Updated 3 years ago
• srishis / DMA8237A_VERIF
  Verification of DMA Controller for 8086 Microprocessor Systems using OO Test bench
  ☆10Updated 4 years ago
• efabless / raptor_soc_template
  Raptor is an SoC Design Template based on Arm Cortex M0 or M3 core.
  ☆18Updated 5 years ago
• AmrElsersy / DMA
  DMA Hardware Description with Verilog
  ☆12Updated 5 years ago
• vladniculescu / High-Speed-FPGA-based-Data-Acquisition-System-100MSPS
  ☆17Updated last year
• abdelazeem201 / Design-and-ASIC-Implementation-of-32-Point-FFT-Processor
  I present a novel pipelined fast Fourier transform (FFT) architecture which is capable of producing the output sequence in normal order. …
  ☆39Updated last year
• KasuganoSoraaa / simple-AXI2AHB-bridge
  AXI master to AHB slave, support INCR/WRAP, out of standing, do not advanced feature such as support out of order, retry, split, etc
  ☆36Updated 2 years ago
• ajackevic / ELEC5882
  The Design and Implementation of a Pulse Compression Filter on an FPGA.
  ☆25Updated 3 years ago
• Ghonimo / Pre_Silicon-AHB-to_APB-Verification
  Comprehensive verification suite for the AHB2APB Bridge design, featuring SystemVerilog and UVM-based methodologies. 🌉🚀
  ☆19Updated 10 months ago
• seonskim / verilog_axi-interconnect
  AXI Interconnect
  ☆47Updated 3 years ago
• brown9804 / PCIe_physical_layer
  Implementation of the PCIe physical layer
  ☆32Updated this week
• fighter212 / ahb2apb
  this is an AHB to APB bridge with Synopsys VIP based test enviroment. RTL can be found from UVM website.
  ☆16Updated 10 years ago
• letitbe0201 / AXI-DMA-master-verification
  ☆23Updated 3 years ago
• obilaniu / MVU
  Neural Network accelerator powered by MVUs and RISC-V.
  ☆12Updated 5 months ago
• mnasser431998 / bfu_dif_fft_rtl
  The verilog code together with cocotb testbench of BFU unit of a DIF FFT processor
  ☆13Updated last year
• tom-urkin / AMBA
  AHB-lite, AHB-APB bridge and extended APB side architecture in SystemVerilog
  ☆9Updated last year
• JoseIuri / axi4lite2uart
  This IP provides a bridge between UART signals and the Advanced Microcontroller Bus Architecture (AMBA®) AXI4 Lite interface.
  ☆17Updated 6 years ago
• freecores / wb_dma
  WISHBONE DMA/Bridge IP Core
  ☆18Updated 10 years ago
• wanderingnail / AXI_DMA
  ☆16Updated 2 years ago
• open-dv / dma_axi
  ☆16Updated 5 years ago