这是武汉大学WHU 计算机组成与设计 RISC-V CPU 流水线设计,包括Modelsim仿真测试,vivado下FPGA(NEXYS A7)测试。
☆32May 21, 2024Updated 2 years ago
Alternatives and similar repositories for riscv_pipeline
Users that are interested in riscv_pipeline are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Mini RISC-V SOC☆13Nov 13, 2015Updated 10 years ago
- A 32 bit RISCV Based SOC with QSpi , Uart and 8 bit SDRAM Controller tagetted to efebless shuttle program☆22Mar 22, 2023Updated 3 years ago
- Satellites data receiver based on GNU Radio☆16Sep 21, 2026Updated 2 weeks ago
- KISCV, a KISS principle riscv32i CPU☆28Jan 11, 2025Updated last year
- Stuff for the hackrf one and portapack☆17May 1, 2023Updated 3 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- Multi-cycle RISC-V processor with RV32I/E[M] implementation, built during a few days off.☆19Oct 29, 2024Updated last year
- L3 R3: AGM RISC-V +CPLD/FPGA MCU (AG32VH407/AG32VF407/AG32VF303)☆14Nov 3, 2024Updated last year
- This project is designed to delay the output of the video stream in AXI-STREAM format.☆13Jul 14, 2024Updated 2 years ago
- Turning cheap(ish) Pluto-SDR receivers into passive radar sensors☆25May 28, 2024Updated 2 years ago
- 使用Cordic算法函数运算,在资源受限的设备上运行(如资源较少的FPGA、嵌入式MCU),避免了浮点运算、乘法、除法,只用移位和加法函数的计算。☆14Mar 22, 2024Updated 2 years ago
- [2025] ModalFormer: Multimodal Transformer for Low-Light Image Enhancement☆28Apr 14, 2026Updated 5 months ago
- This project presents a novel approach for J peak detection in Heart-Rate monitoring. The proposed approach employs accelerometers to col…☆10Oct 30, 2023Updated 2 years ago
- ☆10Feb 16, 2025Updated last year
- 📻 FM radio for rtl-sdr USB dongles in the VCVRack environment☆26Apr 6, 2020Updated 6 years ago
- Deploy open-source AI quickly and easily - Special Bonus Offer • AdRunpod Hub is built for open source. One-click deployment and autoscaling endpoints without provisioning your own infrastructure.
- ARM and RISC-V☆15Aug 21, 2026Updated last month
- 在FPGA端实现JPEG编码(开发中……☆13Oct 17, 2024Updated last year
- Scripts to recover (accidentally) deleted files from ext3 partitions☆13Aug 16, 2017Updated 9 years ago
- RISC-V System on Chip Builder☆12Sep 27, 2020Updated 6 years ago
- ☆11Updated this week
- 本项目使用 Vivado 和 SDK 工程软件上完成系统设计和生成相关部署文件,并在 ARM+FPGA 完成项目部署,实现通过摄取图片并通过 ARM+FPGA 综合部署和加速识别算法,并通过显示驱动,在显示屏上显示摄像头原图和识别结果。☆10Aug 12, 2022Updated 4 years ago
- Signal processing library for research on biosignals (heart signals: ECG, PPG, PCG, BCG, inter-beat intervals)☆14May 18, 2019Updated 7 years ago
- A Python package to automatically identify artifacts in sleep EEG signals and detect data usability for sleep autoscoring☆19Sep 11, 2026Updated last month
- XFS readonly driver for Windows☆15Jun 30, 2012Updated 14 years ago
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- A Multi-source Cross-speed Bearing Fault Diagnosis Method☆13Jan 7, 2025Updated last year
- 一款Cyclone Ⅳ(EP4CE6E22C8N)的FPGA板,板载JTAG下载电路、HDMI(output)、UART、SDRAM、TFT-LCD等☆18Jun 29, 2023Updated 3 years ago
- ☆13Sep 28, 2022Updated 4 years ago
- Project entry for the Secure and Private AI Challenge, hosted by Udacity and sponsored by Facebook (May - August, 2019)☆10Aug 20, 2019Updated 7 years ago
- 基于Zynq UltraScale+ MPSoC的AprilTag算法移植与加速☆13Nov 18, 2023Updated 2 years ago
- In this project, we will perform 12-lead ECG Multi-label Classification. Specifically, we will design a multi-model utilizing the charact…☆12Aug 26, 2024Updated 2 years ago
- Code for the paper "A Novel Interpretable Model via Algorithm Unrolling for Intelligent Fault Diagnosis of Machinery"☆13Dec 14, 2024Updated last year
- NVIDIA SocketCAN drivers for Bosch Time Triggered M_CAN and Tegra Hypervisor sec CAN☆12Dec 26, 2021Updated 4 years ago
- RoPEHAR: Real-time mmWave radar-based human activity recognition with rotary position encoding and efficient temporal modeling.☆15Feb 19, 2026Updated 7 months ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- ☆14Nov 15, 2024Updated last year
- ☆17May 20, 2024Updated 2 years ago
- Procyon is the brightest star in the constellation of Canis Minor. But it's also the name of my RISC-V out-of-order processor.☆12Apr 6, 2023Updated 3 years ago
- Firmware for supported CAN adapters☆13Mar 4, 2015Updated 11 years ago
- Little cpu in verilog.☆12Updated this week
- Sphinx themes ("stanford" and "neo-rtd") based on readthedocs.org☆10Jan 9, 2017Updated 9 years ago
- A Zig Shell☆13Jul 25, 2025Updated last year