Educational materials for RISC-V
☆228Mar 26, 2021Updated 5 years ago
Alternatives and similar repositories for educational-materials
Users that are interested in educational-materials are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- The RISC-V software tools list, as seen on riscv.org☆482Mar 26, 2021Updated 5 years ago
- Multi-Processor System on Chip with RISCV-32 / RISCV-64 / RISCV-128☆14Aug 9, 2026Updated 3 weeks ago
- The binaries for SaxonSoc Linux and other configurations☆18Mar 23, 2023Updated 3 years ago
- PQR5ASM is a RISC-V Assembler compliant with RV32IM☆19Aug 6, 2026Updated 3 weeks ago
- 😎 A curated list of awesome RISC-V implementations☆147Mar 12, 2023Updated 3 years ago
- Bare Metal GPUs on DigitalOcean Gradient AI • AdPurpose-built for serious AI teams training foundational models, running large-scale inference, and pushing the boundaries of what's possible.
- RISC-V Cores, SoC platforms and SoCs☆927Mar 26, 2021Updated 5 years ago
- ☆26Feb 15, 2025Updated last year
- WARP-V is an open-source RISC-V CPU core generator written in TL-Verilog.☆253Updated this week
- This is a hardware implementation of exact multiply accumulator for 32-bit posit number with es=2☆17Jan 27, 2018Updated 8 years ago
- Spike, a RISC-V ISA Simulator☆3,209Updated this week
- The CORE-V CVA6 is a highly configurable, 6-stage RISC-V core for both application and embedded applications. Application class configura…☆3,087Updated this week
- A simple OoO processor developed by njuallen and wierton, it won 2nd prize in LoongsonCup18.☆31Feb 10, 2020Updated 6 years ago
- ☆25Jan 16, 2019Updated 7 years ago
- RISC-V CPU, simple 3-stage pipeline, for low-end applications (e.g., embedded, IoT)☆342Jan 23, 2022Updated 4 years ago
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- educational microarchitectures for risc-v isa☆754Sep 1, 2025Updated 11 months ago
- FPGA examples for 8bitworkshop.com☆30May 23, 2019Updated 7 years ago
- FuseSoC-based SoC for VeeR EH1 and EL2☆343Dec 11, 2024Updated last year
- Z-Core - A Lightweight RISC-V Processor (RV32IMZicsr)☆15Updated this week
- AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication☆1,671Updated this week
- The official RISC-V getting started guide☆202Feb 12, 2024Updated 2 years ago
- RISC-V CPU, simple 5-stage in-order pipeline, for low-end applications needing MMUs and some performance☆383Oct 19, 2023Updated 2 years ago
- Accompanying live info and links for VLSI Design Systems and Redwood EDA "Microprocessor for You in Thirty Hours" Workshop☆101Apr 25, 2026Updated 4 months ago
- Quick'n'dirty FuseSoC+cocotb example☆20Nov 26, 2024Updated last year
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- Quickly update a bitstream with new RAM contents☆17Jun 8, 2021Updated 5 years ago
- Parametric floating-point unit with support for standard RISC-V formats and operations as well as transprecision formats.☆632Jul 24, 2026Updated last month
- SCR1 is a high-quality open-source RISC-V MCU core in Verilog☆999Nov 15, 2024Updated last year
- Test Chip General Purpose OpAmp using Skywater SKY130 PDK☆21Mar 1, 2021Updated 5 years ago
- RISC-V Formal Verification Framework☆634Apr 6, 2022Updated 4 years ago
- Example LED blinking project for your FPGA dev board of choice☆197Feb 28, 2026Updated 6 months ago
- ⛔ DEPRECATED ⛔ RISC-V manycore accelerator for HERO, bigPULP hardware platform☆50Jan 6, 2022Updated 4 years ago
- RISC-V Tools (ISA Simulator and Tests)☆1,194Dec 22, 2022Updated 3 years ago
- Common SystemVerilog components☆791Aug 21, 2026Updated last week
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- Icestudio Collection to drive displays from Open Source FPGAs☆20Jun 28, 2024Updated 2 years ago
- Simulator of a memory controller to connect DRAMSim and FlashDIMMSim into one unified memory☆18Apr 4, 2024Updated 2 years ago
- Opensource building blocks for TinyFPGA microcontrollers and retro computers.☆18Sep 29, 2017Updated 8 years ago
- powerpc processor prototype and an example of semiconductor startup biz plan☆14Feb 2, 2019Updated 7 years ago
- Implementation of the Snappy compression algorithm as a RoCC accelerator☆12Jul 29, 2019Updated 7 years ago
- Proposed RISC-V Composable Custom Extensions Specification☆71Jun 28, 2025Updated last year
- CV32E40P is an in-order 4-stage RISC-V RV32IMFCXpulp CPU based on RI5CY from PULP-Platform☆1,279Updated this week