Alternatives and similar repositories for yahdl

Users that are interested in yahdl are comparing it to the libraries listed below

• cloudxcc / Arduissimo
  Open source MPSoC running 620 MIPS (CHStone) of RISC-V (RV32iMC) programms on the ARTY board (XC7A35T).
  ☆21Updated 5 years ago
• htfab / rotfpga
  A reconfigurable logic circuit made of identical rotatable tiles.
  ☆22Updated 3 years ago
• olofk / observer
  ☆41Updated 5 years ago
• m-labs / VexRiscv-verilog
  Using VexRiscv without installing Scala
  ☆38Updated 3 years ago
• projf / fpgatools
  Tools for FPGA development.
  ☆47Updated 2 weeks ago
• QuickLogic-Corp / EOS-S3
  Device description files (architecture, timing, configuration bitstream, and general documentation) for EOS S3 MCU+eFPGA SoC
  ☆25Updated 3 years ago
• icebreaker-fpga / icebreaker-amaranth-examples
  This repository contains iCEBreaker examples for Amaranth HDL.
  ☆39Updated last year
• gsomlo / yoloRISC
  A RocketChip rv64imac blinky for yosys/nextpnr/trellis & the Lattice ECP5 fpga
  ☆26Updated 5 years ago
• YosysHQ / yosys-plugins
  Yosys Plugins
  ☆21Updated 6 years ago
• f4pga / prjtrellis
  Documenting the Lattice ECP5 bit-stream format.
  ☆56Updated 2 years ago
• SteffenReith / J1Sc
  A reimplementation of a tiny stack CPU
  ☆85Updated last year
• SymbiFlow / nextpnr
  nextpnr portable FPGA place and route tool
  ☆20Updated 11 months ago
• no2fpga / no2bootloader
  USB DFU bootloader gateware / firmware for FPGAs
  ☆67Updated 9 months ago
• enjoy-digital / liteiclink
  Small footprint and configurable Inter-Chip communication cores
  ☆60Updated 3 weeks ago
• terpstra / opa
  Open Processor Architecture
  ☆26Updated 9 years ago
• rob-ng15 / PAWS
  PLEASE MOVE TO PAWSv2
  ☆17Updated 3 years ago
• blackmesalabs / MesaBusProtocol
  Flexible Byte transport protocol for bus bridging CPUs to FPGAs over UART,SPI,SERDES physical interfaces
  ☆33Updated 7 months ago
• SymbioticEDA / getting-started-FV
  ☆18Updated 4 years ago
• FPGA-Research / byteman
  Bitstream relocation and manipulation tool.
  ☆47Updated 2 years ago
• bobbl / rudolv
  RISC-V processor
  ☆31Updated 3 years ago
• enjoy-digital / litex_vexriscv_smp_test
  VexRiscv-SMP integration test with LiteX.
  ☆25Updated 4 years ago
• drom / atom-hide
  Atom Hardware IDE
  ☆13Updated 4 years ago
• daveshah1 / flow-examples
  Misc open FPGA flow examples
  ☆8Updated 5 years ago
• Featherweight-IP / fwrisc
  Featherweight RISC-V implementation
  ☆52Updated 3 years ago
• lawrie / ulx3s-nmigen-examples
  nMigen examples for the ULX3S board
  ☆12Updated 3 years ago
• TUT-ASI / leon3-grlib-gpl-mirror
  Automated Git mirror of Gaisler's GRLIB/Leon3 releases
  ☆17Updated 2 weeks ago
• TUM-LIS / glip
  Generic Logic Interfacing Project
  ☆46Updated 4 years ago
• azonenberg / antikernel-ipcores
  FPGA IP cores for the Antikernel OS, intended to be included as a submodule in SoC integrations
  ☆65Updated last week
• GuzTech / shdl6800
  shdl6800: A 6800 processor written in SpinalHDL
  ☆26Updated 5 years ago
• clairexen / picorv
  PicoRV
  ☆44Updated 5 years ago