qmn / riscv-invictaLinks
A simple RISC-V core, described with Verilog
☆26Updated 12 years ago
Alternatives and similar repositories for riscv-invicta
Users that are interested in riscv-invicta are comparing it to the libraries listed below
Sorting:
- Yet Another RISC-V Implementation☆97Updated 11 months ago
- OpTiMSoC - A tiled SoC platform with a mesh NoC and OpenRISC CPU cores☆85Updated 4 years ago
- educational microarchitectures for risc-v isa☆66Updated 6 years ago
- The CORE-V CVA5 is an Application class 5-stage RISC-V CPU specifically targetting FPGA implementations.☆119Updated last month
- Riscy-SoC is SoC based on RISC-V CPU core, designed in Verilog☆81Updated 5 years ago
- RISC-V Rocket Core on Parallella & ZedBoard Zynq FPGA Boards☆102Updated 6 years ago
- RISC-V System on Chip Template☆159Updated 2 weeks ago
- RISCV model for Verilator/FPGA targets☆53Updated 5 years ago
- PulseRain Reindeer - RISCV RV32I[M] Soft CPU☆128Updated 6 years ago
- FGPU is a soft GPU architecture general purpose computing☆60Updated 4 years ago
- ☆64Updated 6 years ago
- Setup scripts and files needed to compile CoreMark on RISC-V☆70Updated last year
- Verilog implementation of a RISC-V core☆124Updated 6 years ago
- Riscy Processors - Open-Sourced RISC-V Processors☆73Updated 6 years ago
- A Tiny Processor Core☆110Updated last month
- OmniXtend cache coherence protocol☆82Updated 2 months ago
- FPGA reference design for the the Swerv EH1 Core☆71Updated 5 years ago
- ☆50Updated 4 months ago
- ☆40Updated last year
- Lipsi: Probably the Smallest Processor in the World☆86Updated last year
- Facilitates building open source tools for working with hardware description languages (HDLs)☆65Updated 5 years ago
- A barebones 64-bit RISC-V micro-controller class CPU, implementing the I(nteger), M(ul/div), C(ompressed) and K(ryptography) extensions.☆46Updated 3 years ago
- Parallel Array of Simple Cores. Multicore processor.☆99Updated 6 years ago
- AXI Adapter(s) for RISC-V Atomic Operations☆66Updated 3 weeks ago
- Basic floating-point components for RISC-V processors☆66Updated 5 years ago
- ☆144Updated last year
- Clarvi simple RISC-V processor for teaching☆58Updated 8 years ago
- Fraunhofer IMS processor core. RISC-V ISA (RV32IM) with additional peripherals for embedded AI applications and smart sensors.☆96Updated 2 months ago
- Instruction set simulator for RISC-V, MIPS and ARM-v6m☆101Updated 3 years ago
- An Open-Source Design and Verification Environment for RISC-V☆83Updated 4 years ago