mcgodfrey / i2c-eepromLinks
Controller for i2c EEPROM chip in Verilog for Mojo FPGA board
☆25Updated 9 years ago
Alternatives and similar repositories for i2c-eeprom
Users that are interested in i2c-eeprom are comparing it to the libraries listed below
Sorting:
- ☆69Updated 3 years ago
- ☆31Updated 5 years ago
- UART -> AXI Bridge☆61Updated 4 years ago
- Ethernet MAC 10/100 Mbps☆83Updated 5 years ago
- ☆28Updated 4 years ago
- Extremely basic CortexM0 SoC based on ARM DesignStart Eval☆27Updated 6 years ago
- USB 2.0 Device IP Core☆68Updated 7 years ago
- JESD204b modules in VHDL☆30Updated 6 years ago
- QSPI for SoC☆22Updated 5 years ago
- It is SATA 3 host controller. Using this you can read write to sata3 sdd/hdd from your fpga logic with simple memory like interface.☆72Updated last year
- FPGA和USB3.0桥片实现USB3.0通信☆68Updated 3 years ago
- Basic Peripheral SoC (SPI, GPIO, Timer, UART)☆64Updated 5 years ago
- SPI-Flash XIP Interface (Verilog)☆39Updated 3 years ago
- Verilog SPI master and slave☆55Updated 9 years ago
- Open-source high performance AXI4-based HyperRAM memory controller☆75Updated 2 years ago
- Xilinx FPGA, ADC344X, AD9252, 14x 12x Serdes, LVDS☆50Updated 2 years ago
- An SPI to AXI4-lite bridge for easy interfacing of airhdl register banks with any microcontroller.☆49Updated last year
- Example design for the Ethernet FMC using 4 AXI Ethernet Subsystem IP blocks☆66Updated 2 months ago
- Implementation of JESD204B Transport Layer & part of Data Link Layer☆37Updated 4 years ago
- VHDL code for using Xilnx LVDS lines for MIPI CSI-2 TX protocol. For educational purposes☆69Updated 2 years ago
- Interface Protocol in Verilog☆50Updated 5 years ago
- A small test SoC for various soft-CPUs (Cortex-M0, RISC-V)☆33Updated 5 years ago
- 100 MB/s Ethernet MAC Layer Switch☆15Updated 10 years ago
- minimal code to access ps DDR from PL☆20Updated 5 years ago
- MIPI CSI-2 RX☆33Updated 3 years ago
- SPI bus slave and flip-flop register memory map implemented in Verilog 2001 for FPGAs☆16Updated 5 years ago
- A simple Verilog SPI master / slave implementation featuring all 4 modes.☆57Updated 4 years ago
- I2C controller core☆47Updated 2 years ago
- MIPI I3C Basic v1.0 communication Slave source code in Verilog with BSD license to support use in sensors and other devices.☆129Updated 5 years ago
- This repository contains simple implementation of UDP/IP stack with 64-bit AXI-Stream interface. ICMP and ARP requests are partially supp…☆56Updated 3 years ago