Alternatives and similar repositories for Verilog_spi_flash

Users that are interested in Verilog_spi_flash are comparing it to the libraries listed below

• maxs-well / USB_Ctrl
  USB2.0 Verilog
  ☆19Updated 6 years ago
• fighter212 / ahb2apb
  this is an AHB to APB bridge with Synopsys VIP based test enviroment. RTL can be found from UVM website.
  ☆19Updated 11 years ago
• yvnr4you / AMBA_AXI3
  System Verilog and Emulation. Written all the five channels.
  ☆35Updated 8 years ago
• halftop / Interface-Protocol-in-Verilog
  Interface Protocol in Verilog
  ☆51Updated 6 years ago
• zhouzaixin / arm_soc
  ☆14Updated 6 years ago
• DeamonYang / FPGA_SYNC_ASYNC_FIFO
  FPGA 同步FIFO与异步FIFO
  ☆32Updated 6 years ago
• funannoka / SoC-Design-DDR3-Controller
  DDR3 SDRAM Memory Controller Design & Synthesis using System Verilog
  ☆31Updated 7 years ago
• jdocampom / JPEG-Decoder
  Verilog Code for a JPEG Decoder
  ☆34Updated 7 years ago
• Nitcloud / Image_sim
  基于FPGA的图像处理模块（出自于crazybingo）（将部分IP换为纯Verilog用于跨平台移植）
  ☆50Updated 5 years ago
• Wissance / QuickSPI
  Two Verilog SPI module implementations (hard and soft) with advanced options and AXI Full Interface
  ☆21Updated 8 years ago
• zhangkunming0216 / FIFO_-asynchronous
  异步FIFO的内部实现
  ☆25Updated 7 years ago
• haifengch / axi_interconnect
  ☆28Updated 6 months ago
• 2cc2ic / DMA-S2MM-and-MM2S
  Build an open source, extremely simple DMA.
  ☆23Updated 6 years ago
• freecores / axi_master
  Generic AXI master stub
  ☆19Updated 11 years ago
• rnz / verilog-sha256
  Implementation of the SHA256 Algorithm in Verilog
  ☆38Updated 14 years ago
• Lianghao-Yuan / AHB_Bus_Matrix
  ☆38Updated 10 years ago
• brown9804 / PCIe-Physical-Layer
  Implementation of the PCIe physical layer
  ☆60Updated 6 months ago
• ultraembedded / core_soc
  Basic Peripheral SoC (SPI, GPIO, Timer, UART)
  ☆68Updated 5 years ago
• ultraembedded / core_usb_bridge
  USB -> AXI Debug Bridge
  ☆41Updated 4 years ago
• wanderingnail / AXI_DMA
  ☆20Updated 3 years ago
• twomonkeyclub / UART
  ARM中通过APB总线连接的UART模块
  ☆70Updated 5 years ago
• trivedidvijen / SPI-to-I2C-Protocol-Conversion-Using-Verilog
  SPI to I2C Protocol Conversion Using Verilog. Final Year BTech project. Also published an IEEE paper.
  ☆12Updated 4 years ago
• freecores / ethmac
  Ethernet MAC 10/100 Mbps
  ☆83Updated 6 years ago
• kdurant / axi-ddr3
  学习AXI接口，以及xilinx DDR3 IP使用
  ☆38Updated 8 years ago
• JefferyLi0903 / MMC
  MMC小组开发的一个基于Cortex-M0的ARM处理器核的无线SOC设计
  ☆22Updated 2 years ago
• praveenkhemalapure / DDR3-controller-verification
  DDR3 function verification environment in UVM
  ☆26Updated 7 years ago
• aignacio / ahb_lite_bus
  AHB Bus lite v3.0
  ☆16Updated 6 years ago
• iammituraj / fifo
  Synchronous FIFOs designed in Verilog/System Verilog.
  ☆24Updated 3 weeks ago
• dirjud / Nitro-Parts-lib-SPI
  Verilog SPI master and slave
  ☆62Updated 10 years ago
• bhunt2 / DDR4Sim
  DDR4 Simulation Project in System Verilog
  ☆43Updated 11 years ago