Yongxiang-Guo / Verilog_spi_flashLinks
SPI通信实现FLASH读写
☆16Updated 5 years ago
Alternatives and similar repositories for Verilog_spi_flash
Users that are interested in Verilog_spi_flash are comparing it to the libraries listed below
Sorting:
- ☆18Updated 4 years ago
- FPGA和USB3.0桥片实现USB3.0通信☆72Updated 3 years ago
- Interface Protocol in Verilog☆50Updated 6 years ago
- ☆31Updated 4 years ago
- ☆21Updated last month
- Verilog Code for a JPEG Decoder☆34Updated 7 years ago
- 基于FPGA的图像处理模块(出自于crazybingo)(将部分IP换为纯Verilog用于跨平台移植)☆48Updated 5 years ago
- FPGA 同步FIFO与异步FIFO☆31Updated 6 years ago
- DSP with FPGAs 3. edition ISBN: 978-3-540-72612-8☆15Updated 3 years ago
- ☆14Updated 6 years ago
- Two Verilog SPI module implementations (hard and soft) with advanced options and AXI Full Interface☆21Updated 7 years ago
- Basic Peripheral SoC (SPI, GPIO, Timer, UART)☆65Updated 5 years ago
- System Verilog and Emulation. Written all the five channels.☆34Updated 8 years ago
- AHB Bus lite v3.0☆16Updated 6 years ago
- minimal code to access ps DDR from PL☆20Updated 5 years ago
- Ethernet MAC 10/100 Mbps☆84Updated 5 years ago
- Build an open source, extremely simple DMA.☆22Updated 6 years ago
- An FPGA-based LZMA compressor for generic data compression. 基于FPGA的LZMA压缩器,用于通用数据压缩。☆86Updated last year
- DDR3 SDRAM Memory Controller Design & Synthesis using System Verilog☆31Updated 6 years ago
- 异步FIFO的 内部实现☆24Updated 7 years ago
- 软件无线电,使用FPGA进行正交解调。☆22Updated 6 years ago
- Implementation of the PCIe physical layer☆49Updated last month
- Implementation of JESD204B Transport Layer & part of Data Link Layer☆39Updated 4 years ago
- ☆36Updated 10 years ago
- USB -> AXI Debug Bridge☆39Updated 4 years ago
- This IP provides a bridge between UART signals and the Advanced Microcontroller Bus Architecture (AMBA®) AXI4 Lite interface.☆21Updated 6 years ago
- this is an AHB to APB bridge with Synopsys VIP based test enviroment. RTL can be found from UVM website.☆17Updated 11 years ago
- SPI to I2C Protocol Conversion Using Verilog. Final Year BTech project. Also published an IEEE paper.☆11Updated 4 years ago
- Implementation of cryptographic algorithm with verilog hdl(such as des,aes,sha,rsa,ecc etc.)☆39Updated 5 years ago
- IP operations in verilog (simulation and implementation on ice40)☆58Updated 5 years ago