andrade824 / Verilog-SPI-MasterLinks
A SPI Master IP written in verilog which is then used to output characters entered on a keypad to a serial LCD screen
☆19Updated 10 years ago
Alternatives and similar repositories for Verilog-SPI-Master
Users that are interested in Verilog-SPI-Master are comparing it to the libraries listed below
Sorting:
- Extremely basic CortexM0 SoC based on ARM DesignStart Eval☆27Updated 6 years ago
- SPI-Flash XIP Interface (Verilog)☆38Updated 3 years ago
- A small test SoC for various soft-CPUs (Cortex-M0, RISC-V)☆33Updated 5 years ago
- An FPGA SPI flash controller that presents a simple to use FIFO interface to the user.☆18Updated 3 years ago
- PCI bridge☆18Updated 10 years ago
- Simple implementation of I2C interface written on Verilog and SystemC☆42Updated 7 years ago
- A VerilogHDL MCU Core based ARMv6 Cortex-M0☆21Updated 5 years ago
- Raptor is an SoC Design Template based on Arm Cortex M0 or M3 core.☆20Updated 5 years ago
- USB 1.1 Host and Function IP core☆23Updated 10 years ago
- 100 MB/s Ethernet MAC Layer Switch☆15Updated 10 years ago
- It is Gate level netlist of MAXVY's MIPI I3C Basic Master Controller IP along with APB interface support.☆17Updated 5 years ago
- SPI Master Core clone from OpenCores☆11Updated 11 years ago
- A 32 bit RISCV Based SOC with QSpi , Uart and 8 bit SDRAM Controller tagetted to efebless shuttle program☆20Updated 2 years ago
- Controller for i2c EEPROM chip in Verilog for Mojo FPGA board☆25Updated 9 years ago
- UART 16550 core☆37Updated 10 years ago
- A set of Wishbone Controlled SPI Flash Controllers☆82Updated 2 years ago
- Ethernet MAC 10/100 Mbps☆83Updated 5 years ago
- Interface Protocol in Verilog☆50Updated 5 years ago
- Quad SPI Flash XIP Controller with a direct mapped cache☆11Updated 4 years ago
- Basic Peripheral SoC (SPI, GPIO, Timer, UART)☆64Updated 5 years ago
- Small (Q)SPI flash memory programmer in Verilog☆63Updated 2 years ago
- USB Full Speed PHY☆44Updated 5 years ago
- turbo 8051☆29Updated 7 years ago
- Wishbone interconnect utilities☆41Updated 4 months ago
- SPI bus slave and flip-flop register memory map implemented in Verilog 2001 for FPGAs☆16Updated 5 years ago
- 基于FPGA的FFT☆18Updated 6 years ago
- I2C controller core☆46Updated 2 years ago
- The CORDIC algorithm implemented in Octave/MATLAB and Verilog☆29Updated 10 years ago
- Verilog I2C Slave☆23Updated 10 years ago
- An i2c master controller implemented in Verilog☆31Updated 7 years ago