SuperSodaSea / PlugcatLinks
Plug & Play.
☆46Updated 3 weeks ago
Alternatives and similar repositories for Plugcat
Users that are interested in Plugcat are comparing it to the libraries listed below
Sorting:
- Documenting the Catapult v3 SmartNIC FPGA boards (Dragontails Peak & Longs Peak)☆159Updated 2 years ago
- 国产VU13P加速卡资料☆80Updated 9 months ago
- Microsoft Catapult FPGA, Catapult V3, PCIE Test Demo, On-board usb Blaster and OpenCL BSP☆63Updated 3 years ago
- Alibaba Cloud AS02MC04 hack☆27Updated 11 months ago
- DisplayPort IP-core☆83Updated this week
- An FPGA-based HDMI display controller. 基于FPGA的HDMI显示控制器☆81Updated last year
- A superscalar RISC-V CPU with out-of-order execution and multi-core support☆61Updated 3 years ago
- ☆51Updated 4 years ago
- Tang Mega 138K Pro examples☆93Updated 4 months ago
- ☆54Updated 3 years ago
- Documenting Microsoft Catapult FPGA board (v2: Pikes Peak)☆45Updated 5 years ago
- Various examples for Chisel HDL☆30Updated 3 years ago
- A SDCard Controller Based AXI4 Bus with SDIO 4-wire 50MHz Mode(Max Rate 23MB/s)☆126Updated 3 years ago
- VCD viewer☆98Updated 3 months ago
- YPCB-00338-1P1 Hack☆73Updated 11 months ago
- ☆20Updated 2 years ago
- IEEE P1735 decryptor for VHDL☆38Updated 10 years ago
- 使用 VSCode 舒适地开发 Verilog☆35Updated 5 years ago
- Imitate SDcard using FPGAs. 使用FPGA模拟伪装SD卡。☆130Updated 2 years ago
- a hardware design library based on SpinalHDL, especially for stream processing operators on Xilinx FPGAs for Arithmetic, DSP, Communicati…☆67Updated last year
- Basic USB-CDC device core (Verilog)☆82Updated 4 years ago
- Works in Progress and Experiments for the Innova-2 Flex XCKU15P-based Board☆18Updated last year
- ☆33Updated 9 months ago
- It is SATA 3 host controller. Using this you can read write to sata3 sdd/hdd from your fpga logic with simple memory like interface.☆76Updated last year
- ☆64Updated 3 years ago
- A RISC-V core running Debian (and a LoongArch core running Linux).☆22Updated 3 weeks ago
- Hardware design with Chisel☆35Updated 2 years ago
- Xilinx PCIe to MIG DDR4 example designs and custom part data files☆39Updated last year
- Scale-able EDA for FPGA, Verilog/Vivado/Quartus and more☆40Updated last year
- Re-coded Xilinx primitives for Verilator use☆50Updated 5 months ago