SuperSodaSea / PlugcatLinks
Plug & Play.
☆38Updated 2 weeks ago
Alternatives and similar repositories for Plugcat
Users that are interested in Plugcat are comparing it to the libraries listed below
Sorting:
- Documenting the Catapult v3 SmartNIC FPGA boards (Dragontails Peak & Longs Peak)☆151Updated last year
- A superscalar RISC-V CPU with out-of-order execution and multi-core support☆62Updated 3 years ago
- DisplayPort IP-core☆72Updated 2 months ago
- Microsoft Catapult FPGA, Catapult V3, PCIE Test Demo, On-board usb Blaster and OpenCL BSP☆60Updated 2 years ago
- Various examples for Chisel HDL☆30Updated 3 years ago
- 国产VU13P加速卡资料☆76Updated 5 months ago
- Cryptography accelerator ASIC (for AES128/AES256 and SHA256) using Skywater 130nm process node (main project repo). Taped out in December…☆22Updated 4 years ago
- Wrappers for open source FPU hardware implementations.☆33Updated last year
- ☆46Updated 3 years ago
- Hardware design with Chisel☆34Updated 2 years ago
- ☆20Updated 2 years ago
- Open-source RISC-V cryptographic hardware token, RTL repo☆19Updated 2 years ago
- An FPGA-based HDMI display controller. 基于FPGA的HDMI显示控制器☆66Updated last year
- Full-throttle, wire-speed hardware implementation of Wireguard VPN, using low-cost Artix7 FPGA with opensource toolchain. If you seek sec…☆106Updated last month
- Documenting Microsoft Catapult FPGA board (v2: Pikes Peak)☆42Updated 5 years ago
- ☆33Updated 5 months ago
- The 'missing header' for Chisel☆21Updated 5 months ago
- A RISC-V core running Debian (and a LoongArch core running Linux).☆22Updated last year
- RV64GC Linux Capable RISC-V Core☆31Updated 3 weeks ago
- Open source high performance IEEE-754 floating unit☆83Updated last year
- Chisel NVMe controller☆23Updated 2 years ago
- OpenGL 1.x implementation for FPGAs☆96Updated this week
- Tang Mega 138K Pro examples☆79Updated 3 weeks ago
- Antmicro's fast, vendor-neutral DMA IP in Chisel☆123Updated 3 months ago
- ☆31Updated last month
- Synopsys Verdi applet that presents a view of the source code running on a RISC-V processor with a simulation waveform.☆32Updated 5 years ago
- a hardware design library based on SpinalHDL, especially for stream processing operators on Xilinx FPGAs for Arithmetic, DSP, Communicati…☆65Updated last year
- Re-coded Xilinx primitives for Verilator use☆50Updated 2 months ago
- Synthesisable SIMT-style RISC-V GPGPU☆40Updated last month
- Linux-capable in-order superscaler LoongArch32r processor. Silicon-proven.☆44Updated last year