Wren6991 / Hazard2Links
Smol 2-stage RISC-V processor in nMigen
☆26Updated 4 years ago
Alternatives and similar repositories for Hazard2
Users that are interested in Hazard2 are comparing it to the libraries listed below
Sorting:
- Programs for the FOMU, DE10NANO and ULX3S FPGA boards, written in Silice https://github.com/sylefeb/Silice☆36Updated 2 years ago
- Bit streams forthe Ulx3s ECP5 device☆18Updated 2 years ago
- VS Code based debugger for hardware designs in Amaranth or Verilog☆39Updated last year
- My pergola FPGA projects☆30Updated 4 years ago
- Simplified environment for litex☆14Updated 5 years ago
- USB Full-Speed core written in migen/LiteX☆12Updated 6 years ago
- Yet Another Debug Transport☆22Updated last week
- DVI video out example for prjtrellis☆17Updated 6 years ago
- A cheap iCE40 development board, designed on and for Raspberry Pi☆29Updated 6 years ago
- Another size-optimized RISC-V CPU for your consideration.☆58Updated last month
- ☆44Updated 8 months ago
- Test of a RP2040 PMOD attached to a LiteX SoC.☆27Updated 2 years ago
- RISC-V Processor written in Amaranth HDL☆39Updated 3 years ago
- RISC-V CPU implementation in Amaranth HDL (aka nMigen)☆33Updated last year
- An experiment for building gateware for the axiom micro / beta using amaranth-hdl☆45Updated 6 months ago
- Full Speed USB DFU interface for FPGA and ASIC designs☆20Updated last year
- Tiny tips for Colorlight i5 FPGA board☆58Updated 4 years ago
- DDR3 controller for nMigen (WIP)☆14Updated last year
- Utilities for working with a Wishbone bus in an embedded device☆46Updated 3 months ago
- Miscellaneous ULX3S examples (advanced)☆81Updated 5 months ago
- PLEASE MOVE TO PAWSv2☆16Updated 3 years ago
- A configurable USB 2.0 device core☆32Updated 5 years ago
- A low cost FPGA development board based on Lattice iCE40UP5k and Raspberry Pi RP2040.☆45Updated 3 years ago
- NES FPGA implementation synthesized for the ulx3s ecp5 based fpga board☆38Updated 3 years ago
- I want to learn [n]Migen.☆42Updated 5 years ago
- FPGA Odysseus with ULX3S☆69Updated 2 years ago
- Standard HyperRAM core for ECP5 written in Litex/Migen☆14Updated 5 years ago
- Open source hardware down to the chip level!☆30Updated 4 years ago
- Low-cost ECP5 FPGA development board☆80Updated 5 years ago
- Rust proof-of-concept for GPU waveform rendering☆13Updated 5 years ago