peteut / migen-axiLinks
AXI support for Migen/MiSoC
☆28Updated 4 months ago
Alternatives and similar repositories for migen-axi
Users that are interested in migen-axi are comparing it to the libraries listed below
Sorting:
- An experiment for building gateware for the axiom micro / beta using amaranth-hdl☆45Updated 4 months ago
- lightweight open HLS for FPGA rapid prototyping☆20Updated 7 years ago
- iCE40 floorplan viewer☆24Updated 7 years ago
- I want to learn [n]Migen.☆42Updated 5 years ago
- ☆44Updated 7 months ago
- Small footprint and configurable SPI core☆44Updated last week
- FPGA IP cores for the Antikernel OS, intended to be included as a submodule in SoC integrations☆67Updated 3 weeks ago
- assorted library of utility cores for amaranth HDL☆96Updated last year
- System on Chip toolkit for nMigen☆19Updated 5 years ago
- PicoRV☆44Updated 5 years ago
- 妖刀夢渡☆62Updated 6 years ago
- This repository contains iCEBreaker examples for Amaranth HDL.☆39Updated last year
- Board and connector definition files for nMigen☆30Updated 5 years ago
- My pergola FPGA projects☆30Updated 4 years ago
- All Digital Radio Platform written in nmigen targeting FPGAs (for now)☆81Updated 4 years ago
- A configurable USB 2.0 device core☆31Updated 5 years ago
- Mirror of https://codeberg.org/ECP5-PCIe/ECP5-PCIe☆102Updated 2 years ago
- A demonstration showing how several components can be compsed to build a simulated spectrogram☆46Updated last year
- Constraint files for Hardware Description Language (HDL) designs targeting FPGA boards☆45Updated this week
- Experiments with Yosys cxxrtl backend☆50Updated 8 months ago
- Next-Generation FPGA Place-and-Route☆10Updated 7 years ago
- An alternative PnR system, or at least an attempt to get it running on Ubuntu 18.04.☆11Updated 7 years ago
- System on Chip toolkit for Amaranth HDL☆93Updated last year
- Project Peppercorn - GateMate FPGA Bitstream Documentation☆26Updated last week
- RISC-V Processor written in Amaranth HDL☆39Updated 3 years ago
- ☆20Updated 3 years ago
- Project X-Ray Database: XC7 Series☆70Updated 3 years ago
- FPGA USB stack written in LiteX☆128Updated 3 years ago
- Example litex Risc-V SOC and some example code projects in multiple languages.☆69Updated 2 years ago
- Tool for updating the contents of BlockRAMs found in Xilinx 7 series bitstreams.☆19Updated 3 years ago