Alliance VLSI CAD Tools (LIP6)
☆24Dec 11, 2025Updated 8 months ago
Alternatives and similar repositories for alliance
Users that are interested in alliance are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Tutorial, examples and regression tests for Coriolis & Alliance (LIP6)☆17Jul 6, 2026Updated last month
- Coriolis VLSI EDA Tool (LIP6)☆92Aug 5, 2026Updated last week
- Yosys plugin for logic locking and supply-chain security☆24Apr 5, 2025Updated last year
- A bit-serial CPU☆20Sep 29, 2019Updated 6 years ago
- ☆13Jun 21, 2026Updated last month
- Open source password manager - Proton Pass • AdSecurely store, share, and autofill your credentials with Proton Pass, the end-to-end encrypted password manager trusted by millions.
- KiCad symbol library for sky130 and gf180mcu PDKs☆37Jun 9, 2026Updated 2 months ago
- IO and periphery cells for the GF180MCU provided by GlobalFoundries.☆14Dec 3, 2022Updated 3 years ago
- Implementation of a 32-bit single core risc-v platfrom for Xilinx zcu102 board☆13Nov 5, 2019Updated 6 years ago
- Project 1.1 Simulate a Skywater 130nm standard cell using ngspice☆14Jul 18, 2025Updated last year
- IRSIM switch-level simulator for digital circuits☆39Nov 13, 2025Updated 9 months ago
- A fork of Yosys that integrates the CellIFT pass☆14Apr 21, 2026Updated 3 months ago
- Tool to fetch and parse data about Efabless MPW projects☆15Jan 10, 2023Updated 3 years ago
- Library of FPGA architectures☆34Updated this week
- A c project for EDIF format parse.☆14May 10, 2016Updated 10 years ago
- Virtual machines for every use case on DigitalOcean • AdGet dependable uptime with 99.99% SLA, simple security tools, and predictable monthly pricing with DigitalOcean's virtual machines, called Droplets.
- LunaPnR is a place and router for integrated circuits☆48Feb 11, 2026Updated 6 months ago
- ☆11Oct 18, 2024Updated last year
- GUI for SymbiYosys☆18Aug 4, 2026Updated last week
- Low level arithmetic primitives in RTL☆25Apr 3, 2020Updated 6 years ago
- RTLMeter benchmark suite☆31Jul 21, 2026Updated 3 weeks ago
- An open-source Ternary Content Addressable Memory (TCAM) compiler.☆37Jul 19, 2024Updated 2 years ago
- ☆44Jan 26, 2020Updated 6 years ago
- ☆20Aug 3, 2026Updated last week
- An Open-Source Full-Custom Silicon Compiler for High-Performance FPGA Fabrics☆18Jul 31, 2026Updated last week
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- FOSSi Foundation Website☆19Oct 5, 2024Updated last year
- ☆15Oct 24, 2019Updated 6 years ago
- End-to-End Open-Source I2C GPIO Expander☆45Jul 23, 2026Updated 3 weeks ago
- Compiler Explorer for RTL: synthesize Verilog with Yosys and explore timing paths, logic depth, and fanin/fanout interactively☆42Updated this week
- Collection of test cases for Yosys☆17Jan 4, 2022Updated 4 years ago
- ☆11Jul 9, 2024Updated 2 years ago
- A library and command-line tool for querying a Verilog netlist.☆30Jun 13, 2022Updated 4 years ago
- FPGA synthesis tool powered by equality saturation and program synthesis.☆14Jan 9, 2026Updated 7 months ago
- ☆63Jul 11, 2025Updated last year
- End-to-end encrypted email - Proton Mail • AdSpecial offer: 40% Off Yearly / 80% Off First Month. All Proton services are open source and independently audited for security.
- Simulation VCD waveform viewer, using old Motif UI☆28Apr 8, 2023Updated 3 years ago
- OpenDesign Flow Database☆17Oct 31, 2018Updated 7 years ago
- Demo SoC for SiliconCompiler.☆64Jul 2, 2026Updated last month
- SystemVerilog RTL and UVM RAL model generators for RgGen☆17Jul 1, 2026Updated last month
- Universal Hardware Data Model. A complete modeling of the IEEE SystemVerilog Object Model with VPI Interface, Elaborator, Serialization, …☆19Jul 22, 2026Updated 3 weeks ago
- EasierUVM from Doulos now written in Python for easier UVM with framework and template generator☆13Sep 28, 2022Updated 3 years ago
- Open source process design kit for 28nm open process☆90Apr 23, 2024Updated 2 years ago