warclab / idea
iDEA FPGA Soft Processor
☆14Updated 8 years ago
Alternatives and similar repositories for idea:
Users that are interested in idea are comparing it to the libraries listed below
- This is mainly a simulation library of xilinx primitives that are verilator compatible.☆31Updated 6 months ago
- Atom Hardware IDE☆13Updated 3 years ago
- Flexible Byte transport protocol for bus bridging CPUs to FPGAs over UART,SPI,SERDES physical interfaces☆30Updated 2 months ago
- simple hyperram controller☆11Updated 5 years ago
- Yosys Plugins☆21Updated 5 years ago
- Open source MPSoC running 620 MIPS (CHStone) of RISC-V (RV32iMC) programms on the ARTY board (XC7A35T).☆20Updated 5 years ago
- experimentation with gnu make for Xilinx Vivado compilation. dependencies can be complicated.☆22Updated last year
- Sending UDP packets out over a Gigabit PHY with an FPGA.☆42Updated 8 years ago
- The PicoBlaze-Library offers several PicoBlaze devices and code routines to extend a common PicoBlaze environment to a little System on a…☆34Updated 4 years ago
- Wishbone interconnect utilities☆38Updated 8 months ago
- A quick reference/ cheatsheet for the ARM AMBA Advanced eXtensible Interface (AXI)☆26Updated 6 years ago
- Open Processor Architecture☆26Updated 8 years ago
- Library of reusable VHDL components☆26Updated 10 months ago
- FPGA USB 1.1 Low-Speed Implementation☆33Updated 6 years ago
- a playground for xilinx zynq fpga experiments☆48Updated 6 years ago
- A vhdl package for reading and writing bitmap files.☆11Updated 7 years ago
- vhd2vl is designed to translate synthesizable VHDL into Verilog 2001.☆26Updated 9 years ago
- Eclipse based IDE for RISC-V bare metal software development.☆18Updated 5 years ago
- Fork of OpenCores jpegencode with Cocotb testbench☆42Updated 9 years ago
- ☆40Updated 4 years ago
- Tool to parse yosys and nextpnr logfiles to then plot LUT, flip-flop and maximum frequency stats as your project progresses.☆20Updated last year
- ☆20Updated 2 years ago
- A cross platform, formally verified, open source, hyperRAM controller with simulator☆11Updated 5 years ago
- Open source fpga project leveraging vtr CAD flow.☆26Updated last year
- Featherweight RISC-V implementation☆52Updated 3 years ago
- ☆22Updated 8 years ago
- Verilog FPGA Parts Library. Old Octavo soft-CPU project.☆72Updated 5 years ago
- A basic HyperRAM controller for Lattice iCE40 Ultraplus FPGAs☆60Updated 6 years ago
- Reusable Verilog 2005 components for FPGA designs☆39Updated last year
- Misc open FPGA flow examples☆8Updated 5 years ago