silverfoxy/MIPS-Verilog external links

---

GitHub - View repository

GitHub.dev - Open in online code editor

Star history - Growth chart over time

deps.dev - Dependencies and security vulnerabilities

Gitingest - Export source code for LLM usage

Repomix - Export source code for LLM usage

uithub - Export source code for LLM usage

Close

silverfoxy/MIPS-Verilog

Readme badge preview -

If you own this repo, copy the snippet below and add it to your README.md

---

Copy

[![RelatedRepos](https://img.shields.io/badge/related-repos-yellow)](https://relatedrepos.com/gh/silverfoxy/MIPS-Verilog)

Close

silverfoxy / MIPS-VerilogView on GitHubMore

• External links
• Readme badge

MIPS R3000 processor verilog code to be synthesized on Spartan 3E FPGA board.

☆25Oct 3, 2018Updated 7 years ago

Alternatives and similar repositories for MIPS-Verilog

Users that are interested in MIPS-Verilog are comparing it to the libraries listed below

• grantae / mips32r1_core

  View on GitHub
  A 32-bit MIPS processor which aims for conformance to the MIPS32 Release 1 ISA.
  ☆19Jul 29, 2015Updated 10 years ago
• freecores / mips_16

  View on GitHub
  Educational 16-bit MIPS Processor
  ☆18Feb 16, 2019Updated 7 years ago
• myokota / qemu-cortex-m3

  View on GitHub
  Cortex-M3 development tree
  ☆15Jan 4, 2015Updated 11 years ago
• KutuSystems / XilinxIP

  View on GitHub
  Xilinx IP repository
  ☆13May 5, 2018Updated 7 years ago
• freecores / bluespec-h264

  View on GitHub
  Bluespec H.264 Decoder
  ☆12Jul 17, 2014Updated 11 years ago
• sdasgup3 / parallel-processor-design

  View on GitHub
  Super scalar Processor design
  ☆21Sep 7, 2014Updated 11 years ago
• dvanmali / Superscalar_Pipeline_Processor

  View on GitHub
  Design consists of a 32-bit MIPS superscalar pipeline processor in functional Verilog. Runs a cache based memory system, a branch predict…
  ☆15Oct 9, 2017Updated 8 years ago
• jbush001 / PASC

  View on GitHub
  Parallel Array of Simple Cores. Multicore processor.
  ☆100May 16, 2019Updated 6 years ago
• alok-upadhyay / MIPS-in-Verilog

  View on GitHub
  An implementation of MIPS single cycle datapath in Verilog.
  ☆17Mar 11, 2012Updated 13 years ago
• jmahler / mips-cpu

  View on GitHub
  MIPS CPU implemented in Verilog
  ☆643Oct 3, 2017Updated 8 years ago
• freecores / pipelined_fft_256

  View on GitHub
  Pipelined FFT/IFFT 256 points processor
  ☆10Jul 17, 2014Updated 11 years ago
• cupnes / bare_metal_uefi

  View on GitHub
  ☆35Apr 30, 2018Updated 7 years ago
• embmicro / book-examples

  View on GitHub
  ☆31Mar 9, 2017Updated 8 years ago
• NJDFan / register-maps

  View on GitHub
  Use XML files to describe register maps; auto-generate C, VHDL, Python, and HTML.
  ☆13Sep 22, 2025Updated 5 months ago
• alfikpl / aoR3000

  View on GitHub
  The aoR3000 is a MIPS R3000A compatible core capable of booting the Linux kernel version 3.16 in about 3 seconds and with a rating of 48.…
  ☆45Aug 11, 2014Updated 11 years ago
• freecores / ethernet_tri_mode

  View on GitHub
  10_100_1000 Mbps tri-mode ethernet MAC
  ☆10Jul 17, 2014Updated 11 years ago
• huanzhen777 / FileFlexManager

  View on GitHub
  强大灵活的移动端web nas文件管理
  ☆17Jan 5, 2026Updated 2 months ago
• JozefJarosciak / AWS-Connect-Manager

  View on GitHub
  Windows tool for connecting to AWS EC2 instances using SSM, WinSCP or RDP
  ☆12Nov 8, 2021Updated 4 years ago
• freecores / arm4u

  View on GitHub
  ARM4U
  ☆34Jul 17, 2014Updated 11 years ago
• freecores / uart16550

  View on GitHub
  UART 16550 core
  ☆38Jul 17, 2014Updated 11 years ago
• SeniorProject-2016 / Chip-Design

  View on GitHub
  Design and Verification of a Complete Application Specific Integrated Circuit
  ☆12Nov 21, 2016Updated 9 years ago
• WangShayne / vue-input-number-keyboard

  View on GitHub
  数字键盘组件/Input number component
  ☆10Feb 29, 2024Updated 2 years ago
• Digilent / Basys-3

  View on GitHub
  ☆15Aug 19, 2025Updated 6 months ago
• createryany / springboot-init

  View on GitHub
  springboot万用模板
  ☆16Feb 8, 2023Updated 3 years ago
• felipeleivav / spring-boot-soap-client-example

  View on GitHub
  Example project to demonstrate how to connect to a SOAP webservice from a Spring Boot component.
  ☆11Dec 29, 2019Updated 6 years ago
• toosyou / myconfig

  View on GitHub
  My configures and setup when installing a new machine.
  ☆11Jul 30, 2023Updated 2 years ago
• GeekAlexis / superscalar-mips

  View on GitHub
  A MIPS CPU with dual-issue, out-of-order, and 5-stage pipelines
  ☆11Nov 28, 2019Updated 6 years ago
• newObjectccc / vtabs

  View on GitHub
  Vtabs provide the vertical tabs for the chrome browser.
  ☆11Aug 12, 2024Updated last year
• arksjs / tantalum-ui-mobile

  View on GitHub
  A Mobile UI Components built on Vue 3.x
  ☆13May 2, 2025Updated 10 months ago
• RK4 / SimpleRTOS

  View on GitHub
  Simple RTOS for Stm32
  ☆12Nov 8, 2017Updated 8 years ago
• riscvarchive / riscv-zfinx

  View on GitHub
  ☆12Feb 15, 2024Updated 2 years ago
• Mi-V-Soft-RISC-V / miv-rv32-bare-metal-examples

  View on GitHub
  ☆13Aug 7, 2025Updated 7 months ago
• wjoeyzhewei / Alpha64_R10000_Superscalar_Processor

  View on GitHub
  Alpha64 R10000 Two-Way Superscalar Processor
  ☆11May 6, 2019Updated 6 years ago
• gakarak / FCN_MSCOCO_Food_Segmentation

  View on GitHub
  Keras Fully Convolutional Neural Network MSCOCO Food Segmentation
  ☆11Apr 11, 2017Updated 8 years ago
• SilurianYang / uni-hold-tabbar

  View on GitHub
  uni-app native tabbar blocking plugin
  ☆13Jan 7, 2023Updated 3 years ago
• 89luca89 / basic_c_container

  View on GitHub
  basic linux container implementation in C
  ☆12Sep 7, 2020Updated 5 years ago
• RobinBuschmann / type-config

  View on GitHub
  Type safe way defining configurations fed by environment variables, process arguments or json config files (including deserialization an…
  ☆14Jun 13, 2018Updated 7 years ago
• lvm0306 / HSpider

  View on GitHub
  python_daily,爬虫日常篇
  ☆10Jul 6, 2022Updated 3 years ago
• dusty-nv / pytorch-timeseries

  View on GitHub
  ☆10Jun 1, 2023Updated 2 years ago