Alternatives and similar repositories for Advanced-Physical-Design-Using-OpenLANE--Ojasvi-Shah

Users that are interested in Advanced-Physical-Design-Using-OpenLANE--Ojasvi-Shah are comparing it to the libraries listed below

• rajdeep66 / edaBundle_whyRD
  opensource EDA tool flor VLSI design
  ☆35Updated 2 years ago
• amradel2020 / vlsi_linkedin_index
  This repo provide an index of VLSI content creators and their materials
  ☆160Updated last year
• arm-university / VLSI-Fundamentals-Education-Kit
  Gain an understanding of the fundamentals of Very Large-Scale Integration (VLSI), including how the theories and concepts can be applied …
  ☆275Updated 5 months ago
• fayizferosh / soc-design-and-planning-nasscom-vsd
  2 Week digital VLSI SoC design and planning workshop with complete RTL2GDSII flow organised by VSD in collaboration with NASSCOM (Advance…
  ☆29Updated last year
• yathAg / openroad_vsd_7nmContest
  ☆15Updated 2 years ago
• Nirvan007 / Analog_Electronics
  This repository is dedicated to exploring the practical aspects of analog electronic circuits and Analog VLSI design. It contains a colle…
  ☆25Updated last year
• Khalique13 / dvsd_pe_sky130
  This project produces a clean GDSII Layout with all its details that are used to print photomasks used in the fabrication of a behavioral…
  ☆14Updated 4 years ago
• Akash-Perla / ASIC-Design
  This repository contains the tasks performed for VL508- Physical Design of ASIC Course (Fall 2024)
  ☆31Updated 11 months ago
• D-curs-D / Inverter-design-and-analysis-using-sky130pdk
  Design and Analysis of CMOS Inverter using the sky130 pdk and various open source tools
  ☆119Updated 3 years ago
• AbdelrahmanHassanMuhammed / Analog-IC-Design-Problems
  Solve one design problem each day for a month
  ☆49Updated 2 years ago
• abdelazeem201 / Cadence-RTL-to-GDSII-Flow
  In this tutorial, you learn how to implement a design from RTL-to-GDSII using Cadence® tools.
  ☆92Updated last year
• bmurmann / EE628
  EE 628: Analysis and Design of Integrated Circuits (University of Hawaiʻi at Mānoa)
  ☆169Updated 3 months ago
• AnoushkaTripathi / NASSCOM-VSD-SoC-design-Program
  In this workshop, we will delve into the process of designing an Application Specific Integrated Circuit (ASIC) from the Register Transf…
  ☆14Updated last year
• fayizferosh / yosys-tcl-ui-report
  5 Day TCL begginer to advanced training workshop by VSD
  ☆18Updated 2 years ago
• sscs-ose / sscs-ose-code-a-chip.github.io
  IEEE Solid-State Circuits Society (SSCS) Open-Source Ecosystem (OSE)
  ☆195Updated last week
• maazm007 / vsdsquadron-mini-internship
  VSDSquadron Research Internship 2024 program where we learn about RISC-V processor and VLSI Design using various open source tools.
  ☆30Updated 4 months ago
• AngeloJacobo / OpenLANE-Sky130-Physical-Design-Workshop
  Documentation for the 5 day workshop: Advanced Physical Design using OpenLane/Sky130
  ☆67Updated 3 years ago
• Ummidichandrika / 100-Days-of-RTL
  ☆117Updated last year
• asinghani / open-eda-course
  Curriculum for a university course to teach chip design using open source EDA tools
  ☆112Updated 2 years ago
• VardhanSuroshi / Memory-Design-And-Testing
  The project involves the design of a 4X4 (16-bit) SRAM Memory Array using Cadence Virtuoso
  ☆48Updated last year
• nickson-jose / vsdstdcelldesign
  This repository contains all the information needed to run RTL2GDSII flow using openlane flow. Apart from that, it also contain procedure…
  ☆74Updated 4 years ago
• Subhasis-Sahu / SFAL-VSD
  ☆13Updated last year
• ekb0412 / 100DaysofRTL
  "100 days of RTL" is a personal project to learn Verilog HDL RTL design in 100 days, using Xilinx Vivado
  ☆101Updated 2 years ago
• Devipriya1921 / VSDBabySoC_ICC2
  ☆14Updated 3 years ago
• RClabiisc / I2SRV32-S-v1
  Reconfigurable Computing Lab, DESE, Indian Institiute of Science
  ☆30Updated 3 years ago
• arunkpv / vsd-hdp
  ☆19Updated last week
• rpjayaraman / DV-resource
  A repository aggregating links to essential documentation, tutorials, and research papers for hardware Design Verification.
  ☆31Updated 2 months ago
• IHP-GmbH / IHP-AnalogAcademy
  ☆108Updated this week
• snbk001 / Verilog-Design-Examples
  Verilog Design Examples with self checking testbenches. Half Adder, Full Adder, Mux, ALU, D Flip Flop, Sequence Detector using Mealy mach…
  ☆165Updated last year
• kunalg123 / vsdflow
  VSDFLOW is an automated solution to programmers, hobbyists and small scale semiconductor technology entrepreneurs who can craft the…
  ☆164Updated 2 years ago