ShekharShwetank / Quantized_Neural_Network_on_RISC-VLinks
Learning Path: RISC-V & Advanced Edge AI on SiFive FE310-G002 SoC | 32-bit RISC-V | 320 MHz | 16KB L1 Instruction Cache | 128Mbit (16MB) QSPI Flash | 4-stage pipeline
☆14Updated 3 weeks ago
Alternatives and similar repositories for Quantized_Neural_Network_on_RISC-V
Users that are interested in Quantized_Neural_Network_on_RISC-V are comparing it to the libraries listed below
Sorting:
- This repository contains the tasks performed for VL508- Physical Design of ASIC Course (Fall 2024)☆31Updated 10 months ago
- opensource EDA tool flor VLSI design☆34Updated 2 years ago
- Design and Analysis of CMOS Inverter using the sky130 pdk and various open source tools☆119Updated 3 years ago
- VSDSquadron Research Internship 2024 program where we learn about RISC-V processor and VLSI Design using various open source tools.☆29Updated 2 months ago
- 2 Week digital VLSI SoC design and planning workshop with complete RTL2GDSII flow organised by VSD in collaboration with NASSCOM (Advance…☆26Updated last year
- 5 stage pipeline implementation of RISC-V 32I Processor.☆10Updated 10 months ago
- Gain an understanding of the fundamentals of Very Large-Scale Integration (VLSI), including how the theories and concepts can be applied …☆272Updated 4 months ago
- This project give overview of RTL to GDSII of universal shift register using OpenLane and Skywater130 PDK. OpenLane is an automated open-…☆11Updated 3 years ago
- Trying to get a new skill☆25Updated 9 months ago
- This repo provide an index of VLSI content creators and their materials☆157Updated last year
- In this workshop, we will delve into the process of designing an Application Specific Integrated Circuit (ASIC) from the Register Transf…☆12Updated last year
- This repository is dedicated to exploring the practical aspects of analog electronic circuits and Analog VLSI design. It contains a colle…☆24Updated last year
- Gain an introductory knowledge to the basics of SoC design and key skills required to implement a simple SoC on an FPGA, and write embedd…☆141Updated this week
- 30 Days of Verilog: Dive into digital circuits with a month of Verilog coding challenges. From logic gates to FSMs, sharpen your skills a…☆48Updated 2 years ago
- VHDL Guide☆69Updated 3 years ago
- ☆22Updated 2 years ago
- ☆18Updated 5 months ago
- ☆11Updated 8 months ago
- VHDL course at Brno University of Technology☆119Updated 5 months ago
- ☆116Updated last year
- 5 Day TCL begginer to advanced training workshop by VSD☆18Updated last year
- This repository contains some introductory level review about learning about FPGA Design including some tutorials, links to websites and …☆36Updated 6 months ago
- This project was inspired by the efforts of Ben Eater to build an 8 bit computer on a breadboard. Even though this one was not built on a…☆58Updated 2 years ago
- Design, implement, and test an Arm Cortex-A-based SoCs on FPGA hardware using functional specifications, standard hardware description an…☆113Updated this week
- ☆41Updated last year
- Solution to COA LAB Assgn, IIT Kharagpur☆36Updated 6 years ago
- ☆13Updated last year
- "100 days of RTL" is a personal project to learn Verilog HDL RTL design in 100 days, using Xilinx Vivado☆96Updated 2 years ago
- Verilog Fundamentals Explained for Beginners and Professionals☆21Updated 2 years ago
- Advanced Physical Design Using OpenLANE/SKY130 course notes by Ojasvi Shah☆15Updated 11 months ago