Alternatives and similar repositories for XNOR-net-Binary-connect

Users that are interested in XNOR-net-Binary-connect are comparing it to the libraries listed below

• ralbertazzi / bnn
  Training and Implementation of a CNN for image classification with binary weights and activations on FPGA with HLS tools
  ☆52Updated 7 years ago
• awai54st / LUTNet
  ☆58Updated 5 years ago
• DPCEKY / systolic-array
  HLS implemented systolic array structure
  ☆41Updated 7 years ago
• scale-lab / DRUM
  The Verilog source code for DRUM approximate multiplier.
  ☆31Updated 2 years ago
• jgoeders / dac_sdc_2020_designs
  Designs for finalist teams of the DAC System Design Contest
  ☆37Updated 4 years ago
• UCLA-VAST / FlexCNN
  ☆71Updated 2 years ago
• hqjenny / CoDeNet
  ☆19Updated 4 years ago
• jiaaom / HPDLA
  Systolic-array based Deep Learning Accelerator generator
  ☆25Updated 4 years ago
• mohaghasemzadeh / ReBNet
  Residual Binarized Neural Network
  ☆43Updated 7 years ago
• xiangze / CNN_FPGA
  verilog CNN generator for FPGA
  ☆34Updated 4 years ago
• maomran / softmax
  Verilog implementation of Softmax function
  ☆67Updated 2 years ago
• abdelfattah-lab / BRAMAC
  ☆10Updated 7 months ago
• sherylll / lenet5-accelerator
  FPGA and GPU acceleration of LeNet5
  ☆34Updated 5 years ago
• GATECH-EIC / AutoDNNchip
  ☆71Updated 5 years ago
• mohdumar644 / TinyYOLO-BNN
  Example of Tiny YOLO deployed using Xilinx BNN-PYNQ.
  ☆30Updated 6 years ago
• romulus0914 / CNN_VGG19_verilog
  Convolution Neural Network of vgg19 model in verilog
  ☆47Updated 7 years ago
• jonathan93sh / CNNA
  A generic Convolutional Neural Network (CNN) Accelerator (CNNA) for FPGA
  ☆24Updated 3 years ago
• xliu0709 / WinoCNN
  An HLS based winograd systolic CNN accelerator
  ☆53Updated 3 years ago
• racosa / cnn-accelerator
  A Convolutional Neural Network (CNN) hardware accelerator for image recognition
  ☆13Updated 5 years ago
• joycenerd / DNN-accelerator-on-zynq
  Digital Design Lab Spring 2019 Final Project
  ☆11Updated 6 years ago
• yayouz / CNN-accelerator
  DMA controller for CNN accelerator
  ☆13Updated 8 years ago
• lirui-shanghaitech / A-convolution-kernel-implemented-by-Vivado-HLS
  This project implements a convolution kernel based on vivado HLS on zcu104
  ☆37Updated 5 years ago
• ac-optimus / Convolution-using-systolic-arrays
  ☆65Updated 6 years ago
• ChrisZonghaoLi / cnn_conv_accelerator
  A Fix-pointed Rudimentary CNN Convolution Accelerator
  ☆15Updated 4 years ago
• eda-lab / CNNAF-CNN-Accelerator_init
  CNN-Accelerator based on FPGA developed by verilog HDL.
  ☆47Updated 5 years ago
• AlexMontgomerie / fpgaconvnet-tutorial
  A collection of tutorials for the fpgaConvNet framework.
  ☆41Updated 9 months ago
• awai54st / Logic-Shrinkage
  ☆23Updated 2 years ago
• AlexMontgomerie / fpgaconvnet-hls
  ☆30Updated 7 months ago
• PSCLab-ASU / Systolic-CNN
  ☆16Updated 4 years ago
• yuehniu / CNN.frequencyFPGA
  CNN Accelerator in Frequency Domain
  ☆12Updated 5 years ago