☆17Jul 14, 2024Updated 2 years ago
Alternatives and similar repositories for riscduino_dcore
Users that are interested in riscduino_dcore are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Design, verification and ASIC implementation of a complete RISC-V CPU with: five stages pipeline, forwarding, automatic hazard detection,…☆17Apr 12, 2020Updated 6 years ago
- Source-Opened RISCV for Crypto☆18Jan 18, 2022Updated 4 years ago
- RISC-V RV32I CPU written in verilog☆10Jul 11, 2020Updated 6 years ago
- A homage to a classic arcade game☆10Nov 15, 2022Updated 3 years ago
- Tests for the design flow with Synopsys tools for the implementation of a RISC-V processor.☆28Sep 8, 2024Updated last year
- Simple, predictable pricing with DigitalOcean hosting • AdAlways know what you'll pay with monthly caps and flat pricing. Enterprise-grade infrastructure trusted by 600k+ customers.
- Instructions to download programs to (some) Intel MCS-51 compatible MCUs☆11Apr 12, 2017Updated 9 years ago
- RV64IMAC modelling using System Verilog HDL☆26Aug 15, 2026Updated 2 weeks ago
- An iOS app to turn typed text into images of handwritten text in your own handwriting style.☆19Jan 20, 2023Updated 3 years ago
- 5 Stage Pipelined RISC V Processor Design for RV32I Instruction Set☆10Sep 15, 2022Updated 3 years ago
- A 32 bit RISCV Based SOC with QSpi , Uart and 8 bit SDRAM Controller tagetted to efebless shuttle program☆22Mar 22, 2023Updated 3 years ago
- risc-v 单周期和流水线cpu设计, 基于miniRV-1指令集,语言verilog☆11Feb 23, 2023Updated 3 years ago
- Open source tools for IC design☆17Aug 4, 2026Updated 3 weeks ago
- 5-stage RISC-V core (RV32IM) with pipelining designed for educational purposes by RPTU Kaiserslautern, Germany☆14Dec 4, 2025Updated 8 months ago
- I2C master/slave Core☆15Jul 17, 2014Updated 12 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- Virtual Machines Experimentation Sandbox 2☆15Feb 25, 2024Updated 2 years ago
- ☆12Dec 11, 2023Updated 2 years ago
- Source code for 'Beginning Arduino' by Michael McRoberts☆10Mar 28, 2017Updated 9 years ago
- Our project involves the design of an 8-bit microprocessor data-path including 8-byte dual port memory, ALU and barrel shifter using CMOS…☆15Jan 2, 2021Updated 5 years ago
- Three-phase inverter operating at AC100V.☆20Oct 8, 2023Updated 2 years ago
- audio router using esp32☆13Nov 29, 2021Updated 4 years ago
- A synthesizable, five-stage, pipelined 32-bit RISC-V processor (implements the RV32I base ISA)☆13Apr 18, 2024Updated 2 years ago
- This project is about building a Clocked Comparator to be used in a 4-bit Flash ADC & minimize the ADC Figure of Merit given by FoM = Pow…☆17Sep 12, 2023Updated 2 years ago
- This is a set of python codes that forecast electricity price in wholesale power markets using an integrated long-term recurrent convolut…☆16Oct 14, 2022Updated 3 years ago
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- ☆21Nov 8, 2025Updated 9 months ago
- This project shows how to design a clock bootstrapped circuit to improve the nonlinearity of the switch used in Track & Hold circuit. A c…☆13Jul 8, 2019Updated 7 years ago
- ☆14Sep 29, 2024Updated last year
- ☆16Apr 10, 2023Updated 3 years ago
- ☆25Oct 3, 2025Updated 10 months ago
- This project shows the design of two 4-bit current steering DACs, based on Binary and Segmented architectures at VDD=1.8V supply, using h…☆26May 2, 2025Updated last year
- ☆31Feb 22, 2024Updated 2 years ago
- Examples in the MLX framework☆11Sep 23, 2024Updated last year
- Brilliantly Radical Artificially Intelligent Neural Machine☆18Dec 28, 2017Updated 8 years ago
- GPU virtual machines on DigitalOcean Gradient AI • AdGet to production fast with high-performance AMD and NVIDIA GPUs you can spin up in seconds. The definition of operational simplicity.
- I2C slave Verilog Design and TestBench☆27May 9, 2019Updated 7 years ago
- Understand how TCL scripting automates ASIC synthesis and timing analysis using Yosys & OpenTimer, with CSV/Excel inputs acting as fr…☆21Oct 26, 2025Updated 10 months ago
- Backend for the Q/A engine Sal, based on Python Flask and PostgreSQL☆19May 1, 2023Updated 3 years ago
- This project shows how to interface Nokia 5110 LCD with Esp32 module to show current prices of any cryptocurrency like Bitcoin, Dogecoin,…☆22May 9, 2021Updated 5 years ago
- The source code that empowers OpenROAD Cloud☆15Jun 29, 2020Updated 6 years ago
- ☆49Mar 2, 2023Updated 3 years ago
- Implementation of BPSK QPSK ASK and FSK☆16Aug 7, 2020Updated 6 years ago