cornell-zhang / GARNETLinks
GARNET: Reduced-Rank Topology Learning for Robust and Scalable Graph Neural Networks
☆36Updated last year
Alternatives and similar repositories for GARNET
Users that are interested in GARNET are comparing it to the libraries listed below
Sorting:
- ☆11Updated 3 years ago
- [HPCA 2022] GCoD: Graph Convolutional Network Acceleration via Dedicated Algorithm and Accelerator Co-Design☆37Updated 3 years ago
- Polynormer: Polynomial-Expressive Graph Transformer in Linear Time☆41Updated last year
- Hop-Wise Graph Attention for Scalable and Generalizable Learning on Circuits☆30Updated 10 months ago
- QuickEst repository: Quick Estimation of Quality of Results☆26Updated 6 years ago
- Artifact of the MLSys25' paper "GRAPH LEARNING AT SCALE: CHARACTERIZING AND OPTIMIZING PRE-PROPAGATION GNNS"☆10Updated 2 months ago
- Graph-learning assisted instruction vulnerability estimation published in DATE 2020☆14Updated 4 years ago
- A Generic Distributed Auto-Tuning Infrastructure☆22Updated 3 years ago
- Gamora: Graph Learning based Symbolic Reasoning for Large-Scale Boolean Networks (DAC'23)☆50Updated 5 months ago
- A graph linear algebra overlay☆51Updated 2 years ago
- High-Level Synthesis Performance Prediction using GNNs: Benchmarking, Modeling, and Advancing☆51Updated last year
- [FPGA 2020] Open sourced implementation for the ACM/SIGDA FPGA '20 paper titled "GraphACT: Accelerating GCN Training on CPU-FPGA Heteroge…☆18Updated 4 years ago
- An end-to-end GCN inference accelerator written in HLS☆19Updated 3 years ago
- ☆36Updated 3 years ago
- Scaling Graph Processing on HBM-enabled FPGAs with Heterogeneous Pipelines☆19Updated 2 years ago
- DAC'22 paper: "Automated Accelerator Optimization Aided by Graph Neural Networks"☆40Updated last year
- HLSyn benchmark for paper "Towards a Comprehensive Benchmark for FPGA Targeted High-Level Synthesis"☆29Updated last year
- ☆16Updated 2 years ago
- A portable framework to map DFG (dataflow graph, representing an application) on spatial accelerators.☆37Updated 2 years ago
- ☆10Updated 2 years ago
- DATE'24 paper: "Hierarchical Source-to-Post-Route QoR Prediction in High-Level Synthesis with GNNs"☆17Updated 6 months ago
- [ASAP 2020; FPGA 2020] Hardware architecture to accelerate GNNs (common IP modules for minibatch training and full batch inference)☆41Updated 4 years ago
- An Automated Framework for Generic Graph Neural Network Accelerator Generation, Simulation, and Optimization☆23Updated 7 months ago
- Serpens is an HBM FPGA accelerator for SpMV☆19Updated 11 months ago
- This repo is to collect the state-of-the-art GNN hardware acceleration paper☆54Updated 4 years ago
- An HBM FPGA based SpMV Accelerator☆13Updated 9 months ago
- A dataflow architecture for universal graph neural network inference via multi-queue streaming.☆73Updated 2 years ago
- ICCAD'23 Best Paper Award candidate: Robust GNN-based Representation Learning for HLS☆20Updated last year
- Code base for OOPSLA'24 paper: UniSparse: An Intermediate Language for General Sparse Format Customization☆30Updated 7 months ago
- LOSTIN: Logic Optimization via Spatio-Temporal Information with Hybrid Graph Models☆23Updated 3 years ago