calyxir / calyxLinks
Intermediate Language (IL) for Hardware Accelerator Generators
☆532Updated this week
Alternatives and similar repositories for calyx
Users that are interested in calyx are comparing it to the libraries listed below
Sorting:
- Fearless hardware design☆176Updated last month
- Low Level Hardware Description — A foundation for building hardware design tools.☆415Updated 3 years ago
- Time-sensitive affine types for predictable hardware generation☆143Updated 10 months ago
- A hardware compiler based on LLHD and CIRCT☆259Updated last year
- Sail RISC-V model☆552Updated this week
- Sail architecture definition language☆735Updated this week
- Tile based architecture designed for computing efficiency, scalability and generality☆257Updated 2 weeks ago
- Ocelot: The Berkeley Out-of-Order Machine With V-EXT support☆163Updated 4 months ago
- The highest performace Cray-like RISC-V Vector in the world.☆271Updated this week
- ⛔ DEPRECATED ⛔ Lean but mean RISC-V system!☆224Updated last year
- Veryl: A Modern Hardware Description Language☆643Updated this week
- A Python Compiler Design Toolkit☆352Updated this week
- RISC-V support for LLVM projects (LLVM, Clang, ...)☆267Updated 10 months ago
- A core language for rule-based hardware design 🦑☆154Updated 7 months ago
- Working Draft of the RISC-V J Extension Specification☆186Updated 3 weeks ago
- DHLS (Dynamic High-Level Synthesis) compiler based on MLIR☆115Updated this week
- A dependency management tool for hardware projects.☆304Updated 2 weeks ago
- C/C++ frontend for MLIR. Also features polyhedral optimizations, parallel optimizations, and more!☆545Updated this week
- high-performance RTL simulator☆159Updated 11 months ago
- Vitis HLS LLVM source code and examples☆388Updated 7 months ago
- an educational compiler intermediate representation☆668Updated last week
- An MLIR-based toolchain for AMD AI Engine-enabled devices.☆405Updated this week
- Working draft of the proposed RISC-V Bitmanipulation extension☆211Updated last year
- RISC-V CPU, simple 5-stage in-order pipeline, for low-end applications needing MMUs and some performance☆368Updated last year
- Circuit IR Compilers and Tools☆1,829Updated this week
- FireSim: Fast and Effortless FPGA-accelerated Hardware Simulation with On-Prem and Cloud Flexibility☆931Updated last week
- Bluespec Compiler (BSC)☆1,015Updated 3 weeks ago
- SystemVerilog parser library fully compliant with IEEE 1800-2017☆438Updated 3 months ago
- XLS: Accelerated HW Synthesis☆1,291Updated this week
- magma circuits☆261Updated 7 months ago