cornell-zhang / facedetect-fpgaLinks
☆44Updated 5 years ago
Alternatives and similar repositories for facedetect-fpga
Users that are interested in facedetect-fpga are comparing it to the libraries listed below
Sorting:
- ☆84Updated 5 years ago
- This repo is for ECE44x (Fall2015-Spring2016)☆20Updated 7 years ago
- Xilinx Deep Learning IP☆92Updated 4 years ago
- Caffe to VHDL☆67Updated 5 years ago
- ☆90Updated 5 years ago
- SDSoC™ (Software-Defined System-On-Chip) Environment Tutorials☆154Updated 5 years ago
- ☆119Updated 7 years ago
- Hand-written HDL code and C-based HLS designs for K-means clustering implementations on FPGAs☆48Updated 7 years ago
- Premade bitstreams and block designs to complemented the PYNQ overlay tutorial☆40Updated 3 years ago
- A Tutorial on Putting High-Level Synthesis cores in PYNQ☆106Updated 7 years ago
- ☆28Updated 7 years ago
- Verilog Convolutional Neural Network on PYNQ☆28Updated 7 years ago
- Light-weighted neural network inference for object detection on small-scale FPGA board☆91Updated 6 years ago
- PYNQ, Neural network Language model, Overlay☆108Updated 6 years ago
- FireSim-NVDLA: NVIDIA Deep Learning Accelerator (NVDLA) Integrated with RISC-V Rocket Chip SoC Running on the Amazon FPGA Cloud☆162Updated 3 years ago
- HLS branch of Halide☆77Updated 7 years ago
- Linear model training using stochastic gradient descent (SGD) on PYNQ with full to low precision.☆55Updated 7 years ago
- Rosetta: A Realistic High-level Synthesis Benchmark Suite for Software Programmable FPGAs☆166Updated last year
- The 1st place winner's source codes for DAC 2018 System Design Contest, FPGA Track☆89Updated 6 years ago
- Systolic-array based Deep Learning Accelerator generator☆25Updated 4 years ago
- ☆58Updated 5 years ago
- Design contest for DAC 2018☆17Updated 7 years ago
- Open Source Specialized Computing Stack for Accelerating Deep Neural Networks.☆218Updated 6 years ago
- Tutorials on HLS Design☆52Updated 5 years ago
- This project is trying to create a base vitis platform to run with DPU☆47Updated 5 years ago
- Matrix Operation Library for FPGA https://xilinx.github.io/gemx/☆63Updated 5 years ago
- ☆14Updated 9 years ago
- BISMO: A Scalable Bit-Serial Matrix Multiplication Overlay for Reconfigurable Computing☆140Updated 5 years ago
- ☆19Updated 7 years ago
- FPGA-based ZynqNet CNN accelerator developed by Vivado_HLS☆112Updated 8 years ago