NyanCAD / MosaicLinks
A modern schematic entry and simulation program
☆72Updated last month
Alternatives and similar repositories for Mosaic
Users that are interested in Mosaic are comparing it to the libraries listed below
Sorting:
- System on Chip toolkit for Amaranth HDL☆93Updated last year
- an inverter drawn in magic with makefile to simulate☆26Updated 3 years ago
- mantle library☆44Updated 2 years ago
- Prefix tree adder space exploration library☆56Updated 10 months ago
- ☆23Updated 5 months ago
- ☆70Updated last year
- PicoRV☆44Updated 5 years ago
- ☆38Updated 2 years ago
- A minimal-area RISC-V core with a scalable data path to 1, 2, 4, or 8 bits and manifold variants.☆107Updated last month
- LunaPnR is a place and router for integrated circuits☆47Updated 2 months ago
- Custom IC Creator (ciccreator) is a compiler that takes in a object definition file (JSON), a SPICE file, and a design rule file and outp…☆34Updated 3 months ago
- Another size-optimized RISC-V CPU for your consideration.☆57Updated last week
- Board and connector definition files for nMigen☆30Updated 5 years ago
- Board definitions for Amaranth HDL☆119Updated last month
- ☆55Updated 3 months ago
- FPGA IP cores for the Antikernel OS, intended to be included as a submodule in SoC integrations☆67Updated 3 weeks ago
- RISC-V Processor written in Amaranth HDL☆39Updated 3 years ago
- The ILA allows you to perform in-system debugging of your designs on the GateMate FPGA at runtime. All signals of your design inside the …☆54Updated 2 weeks ago
- Translates GDSII into HTML/JS that can be viewed in WebGL-capable web browsers.☆57Updated 5 years ago
- Virtual Development Board☆62Updated 3 years ago
- A Rust VCD parser intended to be the backend of a Waveform Viewer(built using egui) that supports dynamically loaded rust plugins.☆48Updated 9 months ago
- Hot Reconfiguration Technology demo☆40Updated 3 years ago
- Small SERV-based SoC primarily for OpenMPW tapeout☆48Updated 4 months ago
- Experiments with Yosys cxxrtl backend☆50Updated 8 months ago
- Constraint files for Hardware Description Language (HDL) designs targeting FPGA boards☆45Updated this week
- assorted library of utility cores for amaranth HDL☆96Updated last year
- A padring generator for ASICs☆25Updated 2 years ago
- Graded exercises for nMigen (WIP)☆55Updated 4 years ago
- Coriolis VLSI EDA Tool (LIP6)☆72Updated last week
- User-friendly explanation of Yosys options☆112Updated 4 years ago