stineje / sky130_cdsLinks
This repository is an open-source version of SKY130 to help facilitate use of Cadence Design System tools for use with Skywater 130 Process Design Kit
☆29Updated 2 years ago
Alternatives and similar repositories for sky130_cds
Users that are interested in sky130_cds are comparing it to the libraries listed below
Sorting:
- ☆43Updated 3 years ago
- Fully-differential asynchronous non-binary 12-bit SAR-ADC in SKY130, free to re-use under Apache-2.0 license☆50Updated 9 months ago
- This project is done in the course of "Advanced Physical Design using OpenLANE/Sky130" workshop by VLSI System Design Corporation. In thi…☆53Updated 4 years ago
- This repository contains all the information needed to run RTL2GDSII flow using openlane flow. Apart from that, it also contain procedure…☆78Updated 5 years ago
- VSDBabySoC is a small mixed-signal SoC including PLL, DAC, and a RISCV-based processor named RVMYTH.☆49Updated 4 years ago
- JKU IIC OSIC-Multitool for open-source IC (OSIC) design for SKY130.☆77Updated 9 months ago
- repository for a bandgap voltage reference in SKY130 technology☆41Updated 2 years ago
- Custom IC Design Platform☆44Updated this week
- XSCHEM symbol libraries for the Google-Skywater 130nm process design kit.☆67Updated last month
- This repo shows an implementation of an FPGA from RTL to GDS with open Skywater-130 pdk☆38Updated 4 years ago
- Open-source repository for a standard-cell library characterizer using complete open-source tools☆43Updated 3 weeks ago
- Circuit Automatic Characterization Engine☆51Updated 11 months ago
- This project describes how the PNR of an analog IP, 2:1 analog multiplexer is carried out by opensource EDA tools, Openlane. It also disc…☆46Updated 5 years ago
- Open source process design kit for 28nm open process☆72Updated last year
- PLL Designs on Skywater 130nm MPW☆22Updated 2 years ago
- A simple MOSFET model with only 5-DC-parameters for circuit simulation☆49Updated 4 months ago
- Parasitic capacitance analysis of foundry metal stackups☆15Updated 8 months ago
- submission repository for efabless mpw6 shuttle☆31Updated 2 years ago
- Python Tool for UVM Testbench Generation☆55Updated last year
- Characterizer☆30Updated last month
- An Open-Source Toolchain for Top-Metal IC Art and Ultra-High-Fidelity GDSII Renders☆21Updated 3 weeks ago
- An open source PDK using TIGFET 10nm devices.☆54Updated 3 years ago
- FOSS-ASIC-TOOLS is all in one container for SKY130 based design both Analog and Digital. Below is a list of the current tools already ins…☆104Updated last year
- Minimal SKY130 example with self-checking LVS, DRC, and PEX☆24Updated 4 years ago
- ☆14Updated 2 years ago
- Design of 1024x32 SRAM (32Kbits) using OpenRAM and SKY130 PDKs with operating voltage of 1.8V and access time < 2.5ns☆81Updated 4 years ago
- SystemVerilog RTL Linter for YoSys☆22Updated last year
- SKY130 SRAM macros generated by SRAM 22☆18Updated 4 months ago
- Home of the open-source EDA course.☆52Updated 6 months ago
- ☆13Updated 3 years ago