ABC: System for Sequential Logic Synthesis and Formal Verification
☆33Apr 23, 2026Updated last week
Alternatives and similar repositories for abc
Users that are interested in abc are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- GUI for SymbiYosys☆17Oct 13, 2025Updated 6 months ago
- Collection of test cases for Yosys☆17Jan 4, 2022Updated 4 years ago
- Benchmarks for Yosys development☆24Feb 17, 2020Updated 6 years ago
- A padring generator for ASICs☆26May 17, 2023Updated 2 years ago
- Equivalence checking with Yosys☆60Apr 9, 2026Updated 3 weeks ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- ☆17Nov 25, 2017Updated 8 years ago
- A collection of big designs to run post-synthesis simulations with yosys☆51Oct 27, 2015Updated 10 years ago
- EPFL and ISCAS85 combinational benchmark circuits in generic gate verilog☆31Jan 17, 2020Updated 6 years ago
- A normalizing interpreter for the untyped λ-calculus in 292 characters of Haskell☆10Mar 8, 2016Updated 10 years ago
- Project Trellis database☆14Sep 15, 2025Updated 7 months ago
- download the macOS SDK legally without an Apple account☆11Jun 1, 2023Updated 2 years ago
- Mutation Cover with Yosys (MCY)☆91Apr 9, 2026Updated 3 weeks ago
- Documenting the Lattice ECP5 bit-stream format.☆454Feb 26, 2026Updated 2 months ago
- Audio DSP on an FPGA using eurorack-pmod + LiteX with firmware in Rust.☆17Oct 7, 2025Updated 6 months ago
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- Yet Another VHDL tool☆30May 15, 2017Updated 8 years ago
- Next-Generation FPGA Place-and-Route☆10Aug 1, 2018Updated 7 years ago
- Generate symbols from HDL components/modules☆22Feb 6, 2023Updated 3 years ago
- Verilator open-source SystemVerilog simulator and lint system☆23Updated this week
- ☆15Apr 14, 2023Updated 3 years ago
- nextpnr portable FPGA place and route tool☆1,658Updated this week
- C# projects that use ANTLR4 library to analyse VHDL and Verilog code☆11Feb 28, 2015Updated 11 years ago
- Used for hardware trojan detection(Based on Trust_Hub)☆10Jul 30, 2019Updated 6 years ago
- This repository contain source code for ngspice and ghdl integration☆35Feb 25, 2026Updated 2 months ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- A Verilog Synthesis Regression Test☆37Jan 19, 2026Updated 3 months ago
- fundamental traits to describe an architecture in the yaxpeax project☆17Mar 1, 2025Updated last year
- STM32 BluePill as USB SD Card reader in SPI mode with SPL☆14Jan 11, 2022Updated 4 years ago
- A highly integrated, small form factor Motorola 68000 based computer featuring "COM" ports and an "ET"hernet controller, and associated b…☆16Apr 26, 2026Updated last week
- A RRAM addon for the NCSU FreePDK 45nm☆25Jan 10, 2022Updated 4 years ago
- SymbiYosys (sby) -- Front-end for Yosys-based formal verification flows☆504Apr 24, 2026Updated last week
- A reimplementation of a tiny stack CPU☆88Dec 8, 2023Updated 2 years ago
- Project IceStorm - Lattice iCE40 FPGAs Bitstream Documentaion (Reverse Engineered)☆34Jan 22, 2022Updated 4 years ago
- Python library for working Standard Delay Format (SDF) Timing Annotation files.☆31Jul 12, 2024Updated last year
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- Set up your GitHub Actions workflow with a OSS CAD Suite☆16Mar 19, 2026Updated last month
- Yosys Open SYnthesis Suite☆4,423Updated this week
- NetTAG: A Multimodal RTL-and-Layout-Aligned Netlist Foundation Model via Text-Attributed Graph (DAC'25)☆25Dec 21, 2025Updated 4 months ago
- Firmware for Alpha emulation under QEMU☆13Jun 15, 2021Updated 4 years ago
- converts catgirls to gds files☆15May 24, 2021Updated 4 years ago
- ☆20Aug 4, 2022Updated 3 years ago
- PCB Schematics for the Nabu PC☆12May 3, 2024Updated 2 years ago