FOSSEE / nghdlLinks
This repository contain source code for ngspice and ghdl integration
☆33Updated 10 months ago
Alternatives and similar repositories for nghdl
Users that are interested in nghdl are comparing it to the libraries listed below
Sorting:
- Small SERV-based SoC primarily for OpenMPW tapeout☆48Updated 5 months ago
- Custom IC Creator (ciccreator) is a compiler that takes in a object definition file (JSON), a SPICE file, and a design rule file and outp…☆35Updated 4 months ago
- Hardware Design Tool - Mixed Signal Simulation with Verilog☆88Updated 11 months ago
- Open source designs developed with IHP 130nm BiCMOS Open Source PDK. Documentation at https://ihp-open-ip.readthedocs.io/en/latest/☆61Updated 2 months ago
- This package provides a gnucap based qucsator implementation.☆14Updated 2 weeks ago
- An abstract language model of VHDL written in Python.☆57Updated last week
- Coriolis VLSI EDA Tool (LIP6)☆73Updated last month
- IRSIM switch-level simulator for digital circuits☆35Updated this week
- ADMS is a code generator for some of Verilog-A☆102Updated 2 years ago
- FPGA IP cores for the Antikernel OS, intended to be included as a submodule in SoC integrations☆68Updated 2 months ago
- Constraint files for Hardware Description Language (HDL) designs targeting FPGA boards☆45Updated this week
- Translates GDSII into HTML/JS that can be viewed in WebGL-capable web browsers.☆57Updated 5 years ago
- SAR ADC on tiny tapeout☆43Updated 9 months ago
- A repository for Known Good Designs (KGDs). Does not contain any design files with NDA-sensitive information.☆38Updated 4 years ago
- Specification of the Wishbone SoC Interconnect Architecture☆48Updated 3 years ago
- Raptor end-to-end FPGA Compiler and GUI☆90Updated 11 months ago
- Virtual development board for HDL design☆42Updated 2 years ago
- Skill language interpreter☆70Updated 5 years ago
- ☆57Updated 4 months ago
- CVC: Circuit Validity Checker. Check for errors in CDL netlist.☆26Updated 4 months ago
- Framework Open EDA Gui☆73Updated 11 months ago
- Digital Circuit rendering engine☆39Updated 3 months ago
- Conda recipes for FPGA EDA tools for simulation, synthesis, place and route and bitstream generation.☆101Updated 9 months ago
- BAG framework☆41Updated last year
- Sphinx Extension which generates various types of diagrams from Verilog code.☆63Updated 2 years ago
- Web-based HDL diagramming tool☆81Updated 2 years ago
- 🔥 Technology-agnostic FPGA stress-test: maximum logic utilization and high dynamic power consumption.☆31Updated 3 years ago
- ABC: System for Sequential Logic Synthesis and Formal Verification☆29Updated last week
- Facilitates building open source tools for working with hardware description languages (HDLs)☆66Updated 5 years ago
- FPGA tool performance profiling☆103Updated last year