Alternatives and similar repositories for RFSoC-PYNQ

Users that are interested in RFSoC-PYNQ are comparing it to the libraries listed below

• strath-sdr / rfsoc_qpsk
  PYNQ example of using the RFSoC as a QPSK transceiver.
  ☆103Updated 2 years ago
• strath-sdr / rfsoc_studio
  The Strathclyde RFSoC Studio Installer for PYNQ.
  ☆32Updated 2 years ago
• strath-sdr / rfsoc_ofdm
  PYNQ example of an OFDM Transmitter and Receiver on RFSoC.
  ☆49Updated 2 years ago
• Xilinx / RFSoC-MTS
  A PYNQ overlay demonstrating AMD RFSoC Multi-Tile Synchronization (MTS).
  ☆24Updated last year
• strath-sdr / rfsoc_frequency_planner
  An RFSoC Frequency Planner developed using Python.
  ☆28Updated 2 years ago
• Xilinx / PYNQ_RFSOC_Workshop
  Open-sourcing the PYNQ & RFSoC workshop materials
  ☆62Updated 4 years ago
• strath-sdr / rfsoc_radio
  PYNQ example of using the RFSoC as a QPSK/BPSK radio transceiver.
  ☆37Updated 2 years ago
• strath-sdr / rfsoc_qsfp_offload
  RFSoC QSFP Data Offload Design with GNU Radio
  ☆19Updated 6 months ago
• sarafs1926 / ZCU216-PYNQ
  Board repo for the ZCU216 RFSOC
  ☆28Updated 2 years ago
• strath-sdr / rfsoc_sam
  RFSoC Spectrum Analyser Module on PYNQ.
  ☆79Updated 11 months ago
• Xilinx / RFSoC2x2-PYNQ
  RFSoC2x2 board repo for PYNQ
  ☆17Updated 2 years ago
• Xilinx / DSP-PYNQ
  A PYNQ overlay demonstrating Pythonic DSP running on Zynq UltraScale+
  ☆39Updated 2 years ago
• strath-sdr / rfsoc_notebooks
  A collection of RFSoC introductory notebooks for PYNQ.
  ☆23Updated 3 years ago
• strath-sdr / RFSoC-Book
  Companion Jupyter Notebooks for the RFSoC-Book.
  ☆184Updated 2 years ago
• JennySmith888 / 100GBE-PYNQ
  ☆19Updated 3 years ago
• Xilinx / SDFEC-PYNQ
  A PYNQ overlay demonstrating the Xilinx RFSoC SD-FEC
  ☆13Updated 2 years ago
• madamic / zynq_tdc
  A fast high-resolution time-to-digital converter in the Red Pitaya Zynq-7010 SoC
  ☆61Updated 3 years ago
• RedPitaya / RedPitaya-FPGA
  Repository for FPGA projects
  ☆51Updated 7 months ago
• ttchisholm / 10g-low-latency-ethernet
  10G Low Latency Ethernet
  ☆54Updated last year
• strath-sdr / pynq_agc
  Demonstration of Automatic Gain Control with PYNQ
  ☆14Updated 2 years ago
• slaclab / ruckus
  FPGA and Digital ASIC Build System
  ☆74Updated 2 weeks ago
• Xilinx / ZCU111-PYNQ
  Board files to build the ZCU111 PYNQ image
  ☆19Updated 2 years ago
• ATaylorCEngFIET / Vitis_Hero
  ☆27Updated 3 years ago
• Xilinx-Wiki-Projects / ZCU102-Ethernet
  Ethernet Example Projects targeting the Xilinx ZCU102 evaluation board. This repository replaces XAPP1305.
  ☆66Updated 3 months ago
• jfoshea / Viterbi-Decoder-in-Verilog
  An efficient implementation of the Viterbi decoding algorithm in Verilog
  ☆54Updated last year
• BBN-Q / VHDL-JESD204b
  JESD204b modules in VHDL
  ☆30Updated 6 years ago
• adamchristiansen / fpga-ethernet-udp
  An HDL design for sending data over Ethernet
  ☆43Updated 2 years ago
• ZipCPU / dpll
  A collection of phase locked loop (PLL) related projects
  ☆106Updated last year
• Architech-Silica / Designing-a-Custom-AXI-Slave-Peripheral
  A guide to creating custom AXI-lite slave peripherals using the Xilinx Vivado tools
  ☆40Updated 6 years ago
• uwemeyerbaese / DSP_with_FPGAs_ed4
  DSP with FPGAs 4. edition ISBN: 978-3-642-45308-3
  ☆59Updated 3 years ago