Xilinx / RFSoC-MTSLinks
A PYNQ overlay demonstrating AMD RFSoC Multi-Tile Synchronization (MTS).
☆31Updated 2 years ago
Alternatives and similar repositories for RFSoC-MTS
Users that are interested in RFSoC-MTS are comparing it to the libraries listed below
Sorting:
- Board repo for the ZCU216 RFSOC☆31Updated 3 years ago
- Python productivity for RFSoC platforms☆85Updated 2 months ago
- Open-sourcing the PYNQ & RFSoC workshop materials☆63Updated 5 years ago
- The Strathclyde RFSoC Studio Installer for PYNQ.☆35Updated 2 years ago
- PYNQ example of using the RFSoC as a QPSK transceiver.☆109Updated 2 years ago
- An RFSoC Frequency Planner developed using Python.☆31Updated 2 years ago
- RFSoC QSFP Data Offload Design with GNU Radio☆25Updated last year
- PYNQ example of using the RFSoC as a QPSK/BPSK radio transceiver.☆40Updated 2 years ago
- A PYNQ overlay demonstrating Pythonic DSP running on Zynq UltraScale+☆40Updated 3 years ago
- RFSoC2x2 board repo for PYNQ☆17Updated 3 years ago
- PYNQ example of an OFDM Transmitter and Receiver on RFSoC.☆58Updated 2 years ago
- Board files to build the ZCU111 PYNQ image☆20Updated 3 years ago
- RFSoC Spectrum Analyser Module on PYNQ.☆90Updated this week
- A PYNQ overlay demonstrating the Xilinx RFSoC SD-FEC☆13Updated 3 years ago
- Verilog Forward Error Correction Archive: BOX-Muller for fast AWGN generation, Universal Demapper from BPSK to QAM-512, different Forward…☆80Updated 2 years ago
- Vitis Model Composer Examples and Tutorials☆114Updated last month
- A fast high-resolution time-to-digital converter in the Red Pitaya Zynq-7010 SoC☆70Updated 4 years ago
- A collection of phase locked loop (PLL) related projects☆115Updated last year
- 通过调试ADRV9009和AD9371对jesd204b知识点作进一步学习和总结☆23Updated 6 years ago
- DSP with FPGAs 4. edition ISBN: 978-3-642-45308-3☆76Updated 2 months ago
- Learn how to deploy an algorithm to an FPGA using MATLAB and Simulink.☆88Updated last year
- Python library for SerDes modelling☆79Updated last year
- Demonstration of Automatic Gain Control with PYNQ☆17Updated 3 years ago
- ☆19Updated 4 years ago
- An efficient implementation of the Viterbi decoding algorithm in Verilog☆59Updated last year
- Companion Jupyter Notebooks for the RFSoC-Book.☆247Updated 2 years ago
- Verilog digital signal processing components☆168Updated 3 years ago
- Xilinx FPGA, ADC344X, AD9252, 14x 12x Serdes, LVDS☆60Updated 3 years ago
- FEC Codec IP core library for a some famous codes (BCH, RS, LDPC, Turbo)☆129Updated 3 weeks ago
- Verilog based BCH encoder/decoder☆131Updated 3 years ago