strath-sdr / RFSoC-Book
Companion Jupyter Notebooks for the RFSoC-Book.
☆136Updated last year
Related projects: ⓘ
- PYNQ example of using the RFSoC as a QPSK transceiver.☆88Updated last year
- RFSoC Spectrum Analyser Module on PYNQ.☆69Updated 2 months ago
- PYNQ example of an OFDM Transmitter and Receiver on RFSoC.☆44Updated last year
- Open-sourcing the PYNQ & RFSoC workshop materials☆56Updated 3 years ago
- A collection of RFSoC introductory notebooks for PYNQ.☆19Updated 2 years ago
- The Strathclyde RFSoC Studio Installer for PYNQ.☆26Updated last year
- Python productivity for RFSoC platforms☆52Updated 3 months ago
- PYNQ example of using the RFSoC as a QPSK/BPSK radio transceiver.☆29Updated last year
- RFSoC QSFP Data Offload Design with GNU Radio☆14Updated 3 months ago
- FEC Codec IP core library for a some famous codes (BCH, RS, LDPC, Turbo)☆84Updated 2 months ago
- Board repo for the ZCU216 RFSOC☆25Updated 2 years ago
- RFSoC2x2 board repo for PYNQ☆17Updated last year
- Demonstration of Automatic Gain Control with PYNQ☆11Updated 2 years ago
- Repository for FPGA projects☆35Updated last month
- An RFSoC Frequency Planner developed using Python.☆18Updated last year
- A High-Throughput Oversampled Polyphase Filter Bank Using Vivado HLS and PYNQ on a RFSoC☆23Updated last week
- A PYNQ overlay demonstrating Pythonic DSP running on Zynq UltraScale+☆36Updated 2 years ago
- Dual-Mode PSK Transceiver on SDR With FPGA☆18Updated 8 months ago
- MATLAB toolbox for ADI transceiver products☆56Updated this week
- A PYNQ overlay demonstrating the Xilinx RFSoC SD-FEC☆13Updated 2 years ago
- ☆18Updated 3 years ago
- RTL implementation of components for DVB-S2☆106Updated last year
- A ressource efficient, customizable, synthesizable 5G NR lower PHY written in Verilog☆186Updated last year
- This repository includes the source codes for the mmWave SDR developed at the University of South Carolina for the AERPAW at NCSU for wir…☆41Updated 3 weeks ago
- Learn how to deploy an algorithm to an FPGA using MATLAB and Simulink.☆59Updated 3 months ago
- An efficient implementation of the Viterbi decoding algorithm in Verilog☆41Updated 6 months ago
- ☆27Updated 6 months ago
- Verilog Forward Error Correction Archive: BOX-Muller for fast AWGN generation, Universal Demapper from BPSK to QAM-512, different Forward…☆52Updated last year
- A collection of Digital Signal Processing notebooks with a wireless communications theme.☆99Updated last year
- A project demonstrate how to config ad9361 to TX mode and how to transmit MSK☆48Updated 5 years ago