Xilinx / PYNQ_RFSOC_WorkshopLinks
Open-sourcing the PYNQ & RFSoC workshop materials
☆62Updated 4 years ago
Alternatives and similar repositories for PYNQ_RFSOC_Workshop
Users that are interested in PYNQ_RFSOC_Workshop are comparing it to the libraries listed below
Sorting:
- Board repo for the ZCU216 RFSOC☆29Updated 3 years ago
- PYNQ example of using the RFSoC as a QPSK transceiver.☆105Updated 2 years ago
- A PYNQ overlay demonstrating AMD RFSoC Multi-Tile Synchronization (MTS).☆26Updated 2 years ago
- RFSoC Spectrum Analyser Module on PYNQ.☆83Updated last year
- Python productivity for RFSoC platforms☆78Updated last month
- A PYNQ overlay demonstrating the Xilinx RFSoC SD-FEC☆13Updated 3 years ago
- The Strathclyde RFSoC Studio Installer for PYNQ.☆32Updated 2 years ago
- A PYNQ overlay demonstrating Pythonic DSP running on Zynq UltraScale+☆39Updated 3 years ago
- RFSoC2x2 board repo for PYNQ☆17Updated 2 years ago
- PYNQ example of using the RFSoC as a QPSK/BPSK radio transceiver.☆37Updated 2 years ago
- Board files to build the ZCU111 PYNQ image☆19Updated 2 years ago
- Companion Jupyter Notebooks for the RFSoC-Book.☆219Updated 2 years ago
- PYNQ example of an OFDM Transmitter and Receiver on RFSoC.☆50Updated 2 years ago
- Vitis Model Composer Examples and Tutorials☆104Updated last week
- An RFSoC Frequency Planner developed using Python.☆29Updated 2 years ago
- A collection of RFSoC introductory notebooks for PYNQ.☆23Updated 3 years ago
- FEC Codec IP core library for a some famous codes (BCH, RS, LDPC, Turbo)☆113Updated last year
- ☆19Updated 3 months ago
- ☆19Updated 3 years ago
- ☆38Updated 3 weeks ago
- RFSoC QSFP Data Offload Design with GNU Radio☆23Updated 8 months ago
- A collection of phase locked loop (PLL) related projects☆107Updated last year
- ☆19Updated 2 weeks ago
- Demonstration of Automatic Gain Control with PYNQ☆15Updated 3 years ago
- A fast high-resolution time-to-digital converter in the Red Pitaya Zynq-7010 SoC☆65Updated 3 years ago
- PYNQ-ZU, AUP UltraScale+ MPSoC academic board☆26Updated 2 weeks ago
- Repository for FPGA projects☆55Updated 9 months ago
- 10G Low Latency Ethernet☆56Updated 2 years ago
- Verilog Forward Error Correction Archive: BOX-Muller for fast AWGN generation, Universal Demapper from BPSK to QAM-512, different Forward…☆73Updated 2 years ago
- Verilog digital signal processing components☆146Updated 2 years ago