Alternatives and similar repositories for RFSOC-AMC:

Users that are interested in RFSOC-AMC are comparing it to the libraries listed below

• sinara-hw / sinara
  Sayma AMC/RTM issue tracker
  ☆42Updated 6 years ago
• sinara-hw / Urukul
  4 channel 1GS/s DDS (AD9910 or AD9912 variant)
  ☆14Updated 3 months ago
• strath-sdr / rfsoc_radio
  PYNQ example of using the RFSoC as a QPSK/BPSK radio transceiver.
  ☆32Updated last year
• strath-sdr / rfsoc_studio
  The Strathclyde RFSoC Studio Installer for PYNQ.
  ☆27Updated 2 years ago
• madamic / zynq_tdc
  A fast high-resolution time-to-digital converter in the Red Pitaya Zynq-7010 SoC
  ☆55Updated 3 years ago
• nkrackow / SingularitySurfer-FPGA-Lock-In-Amplifier
  Repository for the development of an FPGA based DSP Lock-In Amplifier
  ☆60Updated last year
• Xilinx / SDFEC-PYNQ
  A PYNQ overlay demonstrating the Xilinx RFSoC SD-FEC
  ☆13Updated 2 years ago
• RedPitaya / RedPitaya-FPGA
  Repository for FPGA projects
  ☆45Updated 4 months ago
• yrrapt / amsat_txrx_ic
  An Amateur Radio Transceiver IC (2.4 / 5 / 10 GHz)
  ☆71Updated 3 years ago
• yrrapt / caravel_amsat_txrx_ic
  ☆30Updated 4 years ago
• enjoy-digital / litejesd204b
  Small footprint and configurable JESD204B core
  ☆41Updated last month
• strath-sdr / rfsoc_frequency_planner
  An RFSoC Frequency Planner developed using Python.
  ☆21Updated last year
• quartiq / redpid
  migen + misoc + redpitaya = digital servo
  ☆36Updated 6 years ago
• alexforencich / xfcp
  Extensible FPGA control platform
  ☆57Updated last year
• Xilinx / RFSoC-PYNQ
  Python productivity for RFSoC platforms
  ☆63Updated 9 months ago
• SaabFAN / OpenSource-HW-RF-Signal-Generator-OSHW-RFSG-
  This is a open source hardware (and software) RF Signal Generator using readily available off the shelf-components.
  ☆11Updated 5 years ago
• westonb / open-pmic
  A current mode buck converter on the SKY130 PDK
  ☆27Updated 3 years ago
• m-labs / jesd204b
  JESD204B core for Migen/MiSoC
  ☆36Updated 3 years ago
• ZipCPU / dpll
  A collection of phase locked loop (PLL) related projects
  ☆101Updated last year
• m-labs / tdc-core
  A 26ps RMS time-to-digital converter (TDC) core for Spartan-6 FPGAs
  ☆59Updated 10 years ago
• hukenovs / intfftk
  Fully pipelined Integer Scaled / Unscaled Radix-2 Forward/Inverse Fast Fourier Transform (FFT) IP-core for newest Xilinx FPGAs (Source la…
  ☆81Updated 2 years ago
• chili-chips-ba / openeye-CamSI
  A truly opensource camera serial interface. No frills. No backdoors that compromise security. Outstanding signal integrity. Hi-rez video …
  ☆37Updated this week
• BBN-Q / VHDL-JESD204b
  JESD204b modules in VHDL
  ☆29Updated 5 years ago
• sarafs1926 / ZCU216-PYNQ
  Board repo for the ZCU216 RFSOC
  ☆25Updated 2 years ago
• oscimp / oscimpDigital
  OscillatorIMP ecosystem for the digital characterization of ultrastable oscillators and Software Defined Radio (SDR) frontend processing
  ☆52Updated 3 weeks ago
• strath-sdr / rfsoc_ofdm
  PYNQ example of an OFDM Transmitter and Receiver on RFSoC.
  ☆45Updated last year
• efard / DSPHDL
  ☆40Updated 11 months ago
• strath-sdr / rfsoc_sam
  RFSoC Spectrum Analyser Module on PYNQ.
  ☆70Updated 7 months ago
• owocomm-0 / fpga-fft
  A highly optimized streaming FFT core based on Bailey's 4-step large FFT algorithm
  ☆109Updated 4 years ago
• daveshah1 / RFToolSDR
  AD9361 based USB3 SDR
  ☆101Updated 7 years ago