Alternatives and similar repositories for RFSoC4x2-BSP

Users that are interested in RFSoC4x2-BSP are comparing it to the libraries listed below

• strath-sdr / rfsoc_qsfp_offload
  RFSoC QSFP Data Offload Design with GNU Radio
  ☆26Updated last year
• strath-sdr / rfsoc_qpsk
  PYNQ example of using the RFSoC as a QPSK transceiver.
  ☆112Updated last week
• Xilinx / RFSoC-PYNQ
  Python productivity for RFSoC platforms
  ☆87Updated 3 months ago
• strath-sdr / rfsoc_frequency_planner
  An RFSoC Frequency Planner developed using Python.
  ☆32Updated 2 years ago
• strath-sdr / rfsoc_ofdm
  PYNQ example of an OFDM Transmitter and Receiver on RFSoC.
  ☆59Updated last week
• Xilinx / RFSoC2x2-PYNQ
  RFSoC2x2 board repo for PYNQ
  ☆17Updated 3 years ago
• strath-sdr / rfsoc_studio
  The Strathclyde RFSoC Studio Installer for PYNQ.
  ☆35Updated 3 years ago
• strath-sdr / rfsoc_sam
  RFSoC Spectrum Analyser Module on PYNQ.
  ☆90Updated last week
• strath-sdr / RFSoC-Book
  Companion Jupyter Notebooks for the RFSoC-Book.
  ☆251Updated 2 years ago
• Xilinx / PYNQ_RFSOC_Workshop
  Open-sourcing the PYNQ & RFSoC workshop materials
  ☆63Updated 5 years ago
• Xilinx / RFSoC-MTS
  A PYNQ overlay demonstrating AMD RFSoC Multi-Tile Synchronization (MTS).
  ☆33Updated 2 years ago
• dshekhalev / FEC
  FEC Codec IP core library for a some famous codes (BCH, RS, LDPC, Turbo)
  ☆129Updated last month
• EttusResearch / fpga
  The USRP™ Hardware Driver FPGA Repository
  ☆295Updated 4 years ago
• strath-sdr / rfsoc_radio
  PYNQ example of using the RFSoC as a QPSK/BPSK radio transceiver.
  ☆41Updated last week
• sarafs1926 / ZCU216-PYNQ
  Board repo for the ZCU216 RFSOC
  ☆32Updated 3 years ago
• OpenResearchInstitute / dvb_fpga
  RTL implementation of components for DVB-S2
  ☆131Updated 2 years ago
• Koheron / koheron-sdk
  SDK for FPGA / Linux Instruments
  ☆108Updated last week
• analogdevicesinc / TransceiverToolbox
  MATLAB toolbox for ADI transceiver products
  ☆64Updated 3 weeks ago
• Grootzz / AD9361_TX_MSK
  A project demonstrate how to config ad9361 to TX mode and how to transmit MSK
  ☆62Updated 6 years ago
• Teddy-van-Jerry / sdr-psk-fpga
  Dual-Mode PSK Transceiver on SDR With FPGA
  ☆51Updated last year
• catkira / complex_multiplier
  HDL code for a complex multiplier with AXI stream Interface
  ☆14Updated 2 years ago
• catkira / open5G_phy
  A ressource efficient, customizable, synthesizable 5G NR lower PHY written in Verilog
  ☆222Updated 9 months ago
• JennySmith888 / 100GBE-PYNQ
  ☆19Updated 4 years ago
• MazinLab / RFSoC_OPFB
  A High-Throughput Oversampled Polyphase Filter Bank Using Vivado HLS and PYNQ on a RFSoC
  ☆41Updated last year
• ZipCPU / dblclockfft
  A configurable C++ generator of pipelined Verilog FFT cores
  ☆253Updated last year
• owocomm-0 / fpga-fft
  A highly optimized streaming FFT core based on Bailey's 4-step large FFT algorithm
  ☆127Updated 4 years ago
• lisliyongming / JESD204B
  通过调试ADRV9009和AD9371对jesd204b知识点作进一步学习和总结
  ☆24Updated 6 years ago
• jfoshea / Viterbi-Decoder-in-Verilog
  An efficient implementation of the Viterbi decoding algorithm in Verilog
  ☆60Updated last year
• Lcrypto / FEC-Archive-Verilog
  Verilog Forward Error Correction Archive: BOX-Muller for fast AWGN generation, Universal Demapper from BPSK to QAM-512, different Forward…
  ☆80Updated 2 years ago
• analogdevicesinc / pyadi-iio
  Python interfaces for ADI hardware with IIO drivers (aka peyote)
  ☆210Updated this week