strath-sdr / rfsoc_radio
PYNQ example of using the RFSoC as a QPSK/BPSK radio transceiver.
☆32Updated last year
Alternatives and similar repositories for rfsoc_radio:
Users that are interested in rfsoc_radio are comparing it to the libraries listed below
- Python productivity for RFSoC platforms☆62Updated 8 months ago
- PYNQ example of an OFDM Transmitter and Receiver on RFSoC.☆44Updated last year
- An RFSoC Frequency Planner developed using Python.☆20Updated last year
- PYNQ example of using the RFSoC as a QPSK transceiver.☆96Updated last year
- RFSoC Spectrum Analyser Module on PYNQ.☆70Updated 7 months ago
- The Strathclyde RFSoC Studio Installer for PYNQ.☆27Updated 2 years ago
- Demonstration of Automatic Gain Control with PYNQ☆12Updated 2 years ago
- RFSoC2x2 board repo for PYNQ☆17Updated 2 years ago
- A PYNQ overlay demonstrating the Xilinx RFSoC SD-FEC☆13Updated 2 years ago
- Companion Jupyter Notebooks for the RFSoC-Book.☆160Updated last year
- A PYNQ overlay demonstrating AMD RFSoC Multi-Tile Synchronization (MTS).☆22Updated last year
- RFSoC QSFP Data Offload Design with GNU Radio☆17Updated 2 months ago
- Board repo for the ZCU216 RFSOC☆25Updated 2 years ago
- Verilog Forward Error Correction Archive: BOX-Muller for fast AWGN generation, Universal Demapper from BPSK to QAM-512, different Forward…☆59Updated last year
- A collection of RFSoC introductory notebooks for PYNQ.☆19Updated 3 years ago
- A PYNQ overlay demonstrating Pythonic DSP running on Zynq UltraScale+☆38Updated 2 years ago
- Vitis Model Composer Examples and Tutorials☆81Updated last week
- Open-sourcing the PYNQ & RFSoC workshop materials☆56Updated 4 years ago
- Dual-Mode PSK Transceiver on SDR With FPGA☆25Updated 3 months ago
- PYNQ-ZU, XUP UltraScale+ MPSoC academic board☆20Updated 4 months ago
- A collection of phase locked loop (PLL) related projects☆100Updated last year
- A fast high-resolution time-to-digital converter in the Red Pitaya Zynq-7010 SoC☆55Updated 3 years ago
- FEC Codec IP core library for a some famous codes (BCH, RS, LDPC, Turbo)☆90Updated 7 months ago
- A basic Soft(Gate)ware Defined Radio architecture☆76Updated last year
- ☆40Updated 11 months ago
- ☆18Updated 3 years ago
- RTL implementation of components for DVB-S2☆112Updated last year
- Board files to build the ZCU111 PYNQ image☆18Updated 2 years ago
- SERDES-based TDC core for Spartan-6☆18Updated 12 years ago
- Open source AMD Xilinx Kria UltraScale+ SoM baseboard☆43Updated last week