A CNN-based hardware digit/image recognition module designed on PyTorch and then implemented with Verilog on FPGA
☆22Oct 17, 2022Updated 4 years ago
Alternatives and similar repositories for CNN-Digit-Recognition-Accelerated-on-FPGA
Users that are interested in CNN-Digit-Recognition-Accelerated-on-FPGA are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- This repository is an excuse to learn about Convolutional Neural Networks by implementing one in FPGA. The main goal is to learn, and to …☆12Jul 12, 2020Updated 6 years ago
- FPGA Implementation of Image Processing for MNIST Dataset Based on Convolutional Neural Network Algorithm (CNN)☆11Dec 12, 2023Updated 2 years ago
- Arrhythmia Detection Using Algorithm and Hardware Co-design for Neural Network Inference Accelerators☆16Jun 5, 2023Updated 3 years ago
- ☆21Apr 7, 2021Updated 5 years ago
- Framework for radix encoded SNN on FPGA☆18Dec 7, 2021Updated 4 years ago
- Managed Kubernetes at scale on DigitalOcean • AdDigitalOcean Kubernetes includes the control plane, bandwidth allowance, container registry, automatic updates, and more for free.
- Motion detection in both software and in hardware-accelerated OpenCV☆15Dec 26, 2016Updated 9 years ago
- Accelerating a DCNN (VGG16) with an FPGA by implementing GEMM convolutional Kernel on AWS F1 FPGA and integrate into Pytorch using C++ ex…☆10Jul 12, 2021Updated 5 years ago
- Accelerated Image Reconstruction using Generative Adversarial Networks on Cloud FPGAs☆11Aug 27, 2021Updated 5 years ago
- This is the official project repository for BKDSNN: Enhancing the Performance of Learning-based Spiking Neural Networks Training with Blu…☆39Nov 22, 2024Updated last year
- Digital Standard Cells based SAR ADC☆15Aug 5, 2021Updated 5 years ago
- ov5640_sdram_vga_FPGA☆10Mar 27, 2023Updated 3 years ago
- The goal of this design is to use the PYNQ-Z2 development board to design a general convolution neural network accelerator. And through r…☆12Sep 30, 2020Updated 6 years ago
- This is simply a binary neural network implemented on FPGA. The one and only functionality of this crap is to recognize handwritten digit…☆12Apr 20, 2021Updated 5 years ago
- CORDIC-SNN, followed with "Unsupervised learning of digital recognition using STDP" published in 2015, frontiers☆25Feb 9, 2020Updated 6 years ago
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- EO-CNN: An Enhanced CNN Model Trained by Equilibrium Optimization for Traffic Transportation Prediction☆14Jun 6, 2020Updated 6 years ago
- FPGA accelerated TinyYOLO v2 object detection neural network☆78Jul 31, 2018Updated 8 years ago
- "High density" digital standard cells for SKY130 provided by SkyWater.☆28Feb 22, 2023Updated 3 years ago
- FFT algorithm coded in Verilog. Designed to run on a Xillinx Spartan 6 FPGA board.☆15Jul 19, 2012Updated 14 years ago
- ☆17Mar 2, 2021Updated 5 years ago
- RiscSoC 是一个芯片集成项目,包含了 Cortex-M0、Cortex-M3、MIPS、RISC-V、4-BIT 等内核的 SoC 集成,部分 SoC 使用的自己设计的内核☆13Apr 26, 2022Updated 4 years ago
- Designing CNN accelerator using a Xilinx FPGA board and comparing performance with CPU.☆21Feb 28, 2021Updated 5 years ago
- FPGA acceleration of a Spike-Timing-Dependent Plasticity learning algorithm for Spiking Neural Networks☆41Jun 29, 2020Updated 6 years ago
- ☆10Jan 3, 2022Updated 4 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- This is a 4*5 PE array for LeNet accelerator based on FPGA.☆13Jul 20, 2022Updated 4 years ago
- Using Feature Decomposition method to accelerate GNN inference☆13Sep 27, 2021Updated 5 years ago
- High Radix Adaptive CORDIC Algorithm - Improvement over Traditional CORDIC☆14Jul 15, 2016Updated 10 years ago
- A powerful desktop application for downloading, organizing, and patching Super Mario World ROM hacks from SMWCentral. Streamline your hac…☆11Jul 1, 2026Updated 4 months ago
- Ultra High Performance AXI4-based Direct Memory Access (DMA) Controller. This project was an interview assignment. Work in Progress.☆21Aug 14, 2026Updated 2 months ago
- Approximate arithmetic circuits for FPGAs☆13Feb 19, 2020Updated 6 years ago
- Digital Signal Processing LABs for SUSTECH 2020 FALL (EE323).☆15Jan 2, 2021Updated 5 years ago
- Verilog Code and Logisim simulation of a Weighted Round Robit Arbiter circuit using digital components☆20Mar 10, 2018Updated 8 years ago
- GOMIL: Global Optimization of Multiplier by Integer Linear Programming☆13Aug 25, 2021Updated 5 years ago
- Bare Metal GPUs on DigitalOcean Gradient AI • AdPurpose-built for serious AI teams training foundational models, running large-scale inference, and pushing the boundaries of what's possible.
- ☆13Aug 22, 2018Updated 8 years ago
- A design of 15-order FIR filter using Verilog, with modulation and demodulation system using MATLAB☆11Aug 15, 2020Updated 6 years ago
- AXI4 with a FIFO integrated with VIP☆25Feb 29, 2024Updated 2 years ago
- MMC小组开发的一个基于Cortex-M0的ARM处理器核的无线SOC设计☆21May 24, 2023Updated 3 years ago
- [ICASSP 2024] Emotion Neural Transducer for Fine-Grained Speech Emotion Recognition☆28Apr 11, 2024Updated 2 years ago
- I present a novel pipelined fast Fourier transform (FFT) architecture which is capable of producing the output sequence in normal order. …☆54Dec 3, 2023Updated 2 years ago
- Transfer data from DDR memory to AXI4-Stream Data FIFO and back through AXI DMA☆23May 20, 2019Updated 7 years ago