donlon / axi-dma-controller
Ultra High Performance AXI4-based Direct Memory Access (DMA) Controller. Work in Progress.
☆12Updated 6 months ago
Alternatives and similar repositories for axi-dma-controller
Users that are interested in axi-dma-controller are comparing it to the libraries listed below
Sorting:
- AXI DMA Check: A utility to measure DMA speeds in simulation☆15Updated 3 months ago
- Andes Vector Extension support added to riscv-dv☆16Updated 4 years ago
- A Direct Memory Access Controller (DMAC) with AHB-lite bus interface☆13Updated 7 months ago
- ☆27Updated last month
- Simple and effective parallel CRC calculator written in synthesizable SystemVerilog☆13Updated 6 years ago
- AHB-lite, AHB-APB bridge and extended APB side architecture in SystemVerilog☆14Updated last year
- A DDR3 Controller that uses the Xilinx MIG-7 PHY to interface with DDR3 devices.☆11Updated 3 years ago
- ☆16Updated 6 years ago
- Open FPGA Modules☆23Updated 7 months ago
- Implementation of a binary search tree algorithm in a FPGA/ASIC IP☆19Updated 3 years ago
- AXI X-Bar☆19Updated 5 years ago
- Hamming ECC Encoder and Decoder to protect memories☆32Updated 3 months ago
- Skid Buffer and Pipeline Skid Buffer designed in Verilog/System Verilog.☆18Updated 8 months ago
- AHB-Lite based SoC for IBEX/SWERV/VEXRISC/...☆13Updated last month
- LCAI-TIHU HW is an AI inference processor which is comprised of RISC-V cpu, nvdla, NoC bus, PCIe module, DDR, SRAM, bootROM, DMA and peri…☆37Updated 2 years ago
- SystemVerilog IPs and Modules for architectural redundancy designs.☆14Updated this week
- Azadi (Freedom) is a 32-bit RISC-V CPU based System on Chip.☆32Updated last year
- Multi-Processor System on Chip verified with UVM/OSVVM/FV☆29Updated last week
- Various low power labs using sky130☆12Updated 3 years ago
- APB Logic☆18Updated 5 months ago
- ☆27Updated last year
- LIS Network-on-Chip Implementation☆29Updated 8 years ago
- An open source SDR SDRAM controller based on the AXI4 bus and verified by FPGA and tapeout. It can support memory particles of different …☆17Updated this week
- verification of simple axi-based cache☆18Updated 6 years ago
- Very simple Cortex-M1 SoC design based on ARM DesignStart☆18Updated 3 years ago
- Computational Storage Device based on the open source project OpenSSD.☆23Updated 4 years ago
- A simple, scalable, source-synchronous, all-digital DDR link☆25Updated 2 weeks ago
- DUTH RISC-V Superscalar Microprocessor☆31Updated 6 months ago
- RTL code of some arbitration algorithm☆14Updated 5 years ago
- A 32 bit RISCV Based SOC with QSpi , Uart and 8 bit SDRAM Controller tagetted to efebless shuttle program☆20Updated 2 years ago