☆191Mar 10, 2025Updated last year
Alternatives and similar repositories for VerilogCoder
Users that are interested in VerilogCoder are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- MAGE: A Multi-Agent Engine for Automated RTL Code Generation☆143Apr 11, 2025Updated last year
- Verilog evaluation benchmark for large language model☆490Jul 14, 2025Updated last year
- ☆22Oct 17, 2024Updated 2 years ago
- ☆64Jul 13, 2026Updated 3 months ago
- ☆241Jun 8, 2026Updated 4 months ago
- Managed Kubernetes at scale on DigitalOcean • AdDigitalOcean Kubernetes includes the control plane, bandwidth allowance, container registry, automatic updates, and more for free.
- An open-source benchmark for generating design RTL with natural language☆242Aug 15, 2026Updated 2 months ago
- PRO-V: An Efficient Program Generation Multi-Agent System for Automatic RTL Verification☆36Dec 11, 2025Updated 10 months ago
- ☆64Mar 10, 2025Updated last year
- Fix syntax errors of LLM-generated RTL☆60May 23, 2024Updated 2 years ago
- ☆18Jul 26, 2026Updated 3 months ago
- [DATE 2025] haven: hallucination-mitigated llm for verilog code generation aligned with hdl engineers☆44Jul 9, 2025Updated last year
- LLM Evaluation Benchmark on Hardware Formal Verification☆45Apr 3, 2025Updated last year
- ☆50May 18, 2024Updated 2 years ago
- [NeurIPS 2026] Veri-Sure: Multi-Agent RTL Code Generation with Temporal Tracing, Slicing and Formal Verification☆28Updated this week
- GPUs on demand by Runpod - Special Offer Available • AdRun AI, ML, and HPC workloads on powerful cloud GPUs—without limits or wasted spend. Deploy GPUs in under a minute and pay by the second.
- A new LLM solution for RTL code generation, achieving state-of-the-art performance in non-commercial solutions and outperforming GPT-3.5.☆327Feb 9, 2025Updated last year
- Project Status: Discontinued, New repository: spec2rtl-plugin☆32Feb 1, 2026Updated 8 months ago
- An agentic context evolution approach for RTL coding☆39Sep 20, 2026Updated last month
- Open-source, evidence-driven MCP server for RTL simulation debugging: correlate VCS/Xcelium logs, VCD/FSDB waveforms, SystemVerilog/UVM s…☆123Oct 13, 2026Updated 2 weeks ago
- Verilog Generation with Reinforcement Learning☆12Jul 15, 2025Updated last year
- Generating Hardware Verification Assertions from Design Specifications via Multi-LLMs☆72Oct 28, 2024Updated 2 years ago
- Verilog auto debug with Gpts☆11Feb 25, 2025Updated last year
- ☆59Jan 6, 2026Updated 9 months ago
- ☆31Jan 30, 2025Updated last year
- Bare Metal GPUs on DigitalOcean Gradient AI • AdPurpose-built for serious AI teams training foundational models, running large-scale inference, and pushing the boundaries of what's possible.
- ☆211Oct 17, 2024Updated 2 years ago
- OriGen: Enhancing RTL Code Generation with Code-to-Code Augmentation and Self-Reflection(ICCAD 2024)☆35Oct 20, 2024Updated 2 years ago
- ☆58Oct 8, 2024Updated 2 years ago
- ☆298Jul 8, 2024Updated 2 years ago
- LLM-DSE: Searching Accelerator Parameters with LLM Agents☆19May 22, 2025Updated last year
- ☆32Aug 18, 2025Updated last year
- UnityChip Verification AI-Agent☆234Updated this week
- The first large scale formally verified reasoning dataset for Verilog☆25May 16, 2025Updated last year
- CircuitFusion: Multimodal Circuit Representation Learning for Agile Chip Design (ICLR'25)☆45Apr 13, 2025Updated last year
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- ☆46Apr 11, 2025Updated last year
- DeepGate3 for ICCAD2024☆14Updated this week
- ICRTL Benchmark: Industrial-level RTL design challenges for evaluating PPA optimization, code generation, and LLM applications in EDA.☆35Jul 3, 2026Updated 3 months ago
- Generative Benchmark for LLM-Aided Hardware Design☆30Jun 4, 2025Updated last year
- ☆11Feb 26, 2025Updated last year
- Benchmarking LLM agents on real-world hardware bug repair tasks☆70Aug 1, 2026Updated 2 months ago
- Natural language is not enough: Benchmarking multi-modal generative AI for Verilog generation (ICCAD 2024)☆41Jun 17, 2025Updated last year