Overall multi-core SIMD microarchitecture
☆25Aug 15, 2017Updated 8 years ago
Alternatives and similar repositories for SIMD-architecture
Users that are interested in SIMD-architecture are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Matrix multiplication accelerator on ZYNQ SoC.☆12Apr 29, 2025Updated last year
- ☆14Feb 24, 2025Updated last year
- Implementation of a simple SIMD processor in Verilog, core of which is a 16-bit SIMD ALU. 2's compliment calculations are implemented in …☆149Jul 17, 2022Updated 3 years ago
- A configurable general purpose graphics processing unit for☆12May 18, 2019Updated 7 years ago
- a scaleable ring topology network on chip (NoC) implemented in BSV☆12Oct 14, 2014Updated 11 years ago
- Managed Kubernetes at scale on DigitalOcean • AdDigitalOcean Kubernetes includes the control plane, bandwidth allowance, container registry, automatic updates, and more for free.
- System on Chip with RISCV-32 / RISCV-64 / RISCV-128☆22Updated this week
- Generic AHB master stub☆12Jul 17, 2014Updated 11 years ago
- FGNN's artifact evaluation (EuroSys 2022)☆18Apr 25, 2022Updated 4 years ago
- ☆15May 10, 2019Updated 7 years ago
- 标准视频时序生成器☆10Feb 9, 2020Updated 6 years ago
- Verilog-Based-NoC-Simulator☆11May 4, 2016Updated 10 years ago
- Verilog code that does 2D Low Pass Filter on a greyscale image☆10Sep 22, 2015Updated 10 years ago
- Multi-Processor System on Chip with RISCV-32 / RISCV-64 / RISCV-128☆13Updated this week
- Advanced Peripheral Bus (APB) UVM testbench project☆10Apr 9, 2017Updated 9 years ago
- Serverless GPU API endpoints on Runpod - Get Bonus Credits • AdSkip the infrastructure headaches. Auto-scaling, pay-as-you-go, no-ops approach lets you focus on innovating your application.
- FIR，FFT based on Verilog☆14Dec 3, 2017Updated 8 years ago
- AXI DMA Check: A utility to measure DMA speeds in simulation☆15Jan 22, 2025Updated last year
- Parallel Array of Simple Cores. Multicore processor.☆101May 16, 2019Updated 7 years ago
- 位宽和深度可定制的异步FIFO☆14May 29, 2024Updated last year
- UVM testbench for verifying the Pulpino SoC☆14Mar 23, 2020Updated 6 years ago
- Direct Access Memory for MPSoC☆13Updated this week
- 第四届全国大学生嵌入式比赛SoC☆12Apr 1, 2022Updated 4 years ago
- User-mode trap-and-emulate hypervisor for RISC-V☆14Feb 11, 2022Updated 4 years ago
- DSP WishBone Compatible Cores☆14Jul 17, 2014Updated 11 years ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- DMA core compatible with AHB3-Lite☆13Mar 30, 2019Updated 7 years ago
- Quad SPI Flash XIP Controller with a direct mapped cache☆12Dec 9, 2020Updated 5 years ago
- ☆14Nov 11, 2015Updated 10 years ago
- Designed a pipelined calculation engine to read input/weights of neuron and compute/store results in SystemVerilog. Implemented fabric to…☆12Feb 12, 2019Updated 7 years ago
- Functional Verification the MMU (Memory Management Unit) of a multiprocessor with Data Cache and Instruction Cache☆14Nov 9, 2015Updated 10 years ago
- Verification of Ethernet Switch System Verilog☆12Oct 21, 2016Updated 9 years ago
- 一个基于AXI接口的PL端卷积加速器，可由PS端调用☆12Apr 15, 2023Updated 3 years ago
- tools regarding on analog modeling, validation, and generation☆23Apr 11, 2023Updated 3 years ago
- ☆14Nov 5, 2017Updated 8 years ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- SystemC simulator of a highly customizable Nostrum network-on-chip (NoC).☆14Apr 20, 2014Updated 12 years ago
- IPs for data-plane integration of Hardware Processing Engines (HWPEs) within a PULP system☆21Updated this week
- mirror of https://git.elphel.com/Elphel/eddr3☆42Oct 16, 2017Updated 8 years ago
- SPIR-V fragment shader GPU core based on RISC-V☆44May 26, 2021Updated 5 years ago
- Lectures on Computer Architecture☆13Apr 11, 2022Updated 4 years ago
- Simple demo showing how to use the ping pong FIFO☆16May 2, 2016Updated 10 years ago
- CNN accelerator using NoC architecture☆18Dec 6, 2018Updated 7 years ago