RTL and UVM test code of a Multi-NoC system
☆12Dec 7, 2021Updated 4 years ago
Alternatives and similar repositories for Multi-NoC
Users that are interested in Multi-NoC are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- ☆13May 8, 2022Updated 4 years ago
- ☆27May 31, 2021Updated 5 years ago
- Functional Verification the MMU (Memory Management Unit) of a multiprocessor with Data Cache and Instruction Cache☆14Nov 9, 2015Updated 10 years ago
- work in SSRL, SOC/NOC/Chiplet Design, DDR/UCIe/PCIe, UVM Framework☆41Nov 24, 2022Updated 3 years ago
- This is the UVM environment for UART-APB IP core. This environment contains full UVM components. It is only used for studing and invetiga…☆27Updated this week
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- A configurable general purpose graphics processing unit for☆12May 18, 2019Updated 7 years ago
- ☆14Jun 30, 2019Updated 7 years ago
- Convolutional Neural Networks Coprocessor☆12Dec 8, 2022Updated 3 years ago
- Prototype-network-on-chip (ProNoC) is an EDA tool that facilitates prototyping of custom heterogeneous NoC-based many-core-SoC (MCSoC).☆69Aug 28, 2026Updated last month
- RISC-V vector and tensor compute extensions for Vortex GPGPU acceleration for ML workloads. Optimized for transformer models, CNNs, and g…☆25Apr 25, 2025Updated last year
- Tensor computing core☆15Jul 8, 2026Updated 3 months ago
- Designed a closed page policy memory controller following the timing specifications for DDR3 DRAM in system verilog. Was responsible for …☆11Mar 4, 2020Updated 6 years ago
- An Open Source Link Protocol and Controller☆29Aug 1, 2021Updated 5 years ago
- commit rtl and build cosim env☆16Feb 15, 2024Updated 2 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- A systemverilog/UVM/Makefile testbench for Rocket RISC-V SoCs☆11Jun 19, 2020Updated 6 years ago
- DMA controller for CNN accelerator☆15May 22, 2017Updated 9 years ago
- 标准视频时序生成器☆10Feb 9, 2020Updated 6 years ago
- SoC based on RISC V ISA☆10Apr 22, 2022Updated 4 years ago
- 位宽和深度可定制的异步FIFO☆14May 29, 2024Updated 2 years ago
- ☆14Jun 9, 2026Updated 4 months ago
- Generic AHB master stub☆12Jul 17, 2014Updated 12 years ago
- LIS Network-on-Chip Implementation☆34Aug 29, 2016Updated 10 years ago
- ☆10Dec 15, 2023Updated 2 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- Verilog code that does 2D Low Pass Filter on a greyscale image☆10Sep 22, 2015Updated 11 years ago
- Gemini 30F2 (30F3 variant 00) MIPS Processor for NSCSCC2022☆11Sep 21, 2022Updated 4 years ago
- Advanced Peripheral Bus (APB) UVM testbench project☆10Apr 9, 2017Updated 9 years ago
- FIR,FFT based on Verilog☆14Dec 3, 2017Updated 8 years ago
- Verification of Ethernet Switch System Verilog☆12Oct 21, 2016Updated 10 years ago
- 爬取百度指数数据☆12Dec 8, 2022Updated 3 years ago
- Verilog-Based-NoC-Simulator☆12May 4, 2016Updated 10 years ago
- My MSc Thesis: Low Latency Router Microarchitecture for Network-on-Chip Implemented on an FPGA☆13Jun 26, 2018Updated 8 years ago
- An open-source hybrid Mesh–Crossbar NoC for scalable, low-latency shared-L1-memory clusters with thousands of cores.☆43Oct 15, 2026Updated last week
- Virtual machines for every use case on DigitalOcean • AdGet dependable uptime with 99.99% SLA, simple security tools, and predictable monthly pricing with DigitalOcean's virtual machines, called Droplets.
- a scaleable ring topology network on chip (NoC) implemented in BSV☆12Oct 14, 2014Updated 12 years ago
- AXI DMA Check: A utility to measure DMA speeds in simulation☆16Jan 22, 2025Updated last year
- ☆15Oct 27, 2024Updated last year
- ☆20May 1, 2023Updated 3 years ago
- Formal Verification of RISC V IM Processor☆12Mar 27, 2022Updated 4 years ago
- DSP WishBone Compatible Cores☆14Jul 17, 2014Updated 12 years ago
- 第四届全国大学生嵌入式比赛SoC☆12Apr 1, 2022Updated 4 years ago