Alternatives and similar repositories for mg-verilog

Users that are interested in mg-verilog are comparing it to the libraries listed below

• stable-lab / MAGE
  MAGE: A Multi-Agent Engine for Automated RTL Code Generation
  ☆58Updated 4 months ago
• hkust-zhiyao / RTL-Coder
  A new LLM solution for RTL code generation, achieving state-of-the-art performance in non-commercial solutions and outperforming GPT-3.5.
  ☆220Updated 6 months ago
• hkust-zhiyao / RTLLM
  An open-source benchmark for generating design RTL with natural language
  ☆127Updated 9 months ago
• mit-han-lab / spatten
  [HPCA'21] SpAtten: Efficient Sparse Attention Architecture with Cascade Token and Head Pruning
  ☆101Updated last year
• UIUC-ChenLab / Chrysalis-HLS
  ☆14Updated last year
• aichipdesign / chipgptft
  Data is all you need: Finetuning LLMs for Chip Design via an Automated design-data augmentation framework (DAC 2024)
  ☆47Updated 8 months ago
• shailja-thakur / VGen
  ☆179Updated 10 months ago
• leesou / H2-LLM-ISCA-2025
  H2-LLM: Hardware-Dataflow Co-Exploration for Heterogeneous Hybrid-Bonding-based Low-Batch LLM Inference
  ☆53Updated 4 months ago
• pku-liang / OriGen
  OriGen: Enhancing RTL Code Generation with Code-to-Code Augmentation and Self-Reflection(ICCAD 2024)
  ☆22Updated 10 months ago
• NVlabs / verilog-eval
  Verilog evaluation benchmark for large language model
  ☆311Updated last month
• mec-UMN / HISIM
  HISIM introduces a suite of analytical models at the system level to speed up performance prediction for AI models, covering logic-on-log…
  ☆43Updated 5 months ago
• magicYang1573 / llm-hardware-test-generation
  ☆32Updated last year
• actlab-genesys / GeneSys
  An open-source parameterizable NPU generator with full-stack multi-target compilation stack for intelligent workloads.
  ☆62Updated 5 months ago
• cornell-zhang / HOGA
  Hop-Wise Graph Attention for Scalable and Generalizable Learning on Circuits
  ☆30Updated last year
• IPRC-DIP / CodeV
  ☆47Updated 2 months ago
• linghaosong / Sextans
  An FPGA accelerator for general-purpose Sparse-Matrix Dense-Matrix Multiplication (SpMM).
  ☆83Updated last year
• tancheng / mlir-cgra
  An MLIR dialect to enable the efficient acceleration of ML model on CGRAs.
  ☆60Updated 10 months ago
• UCLA-VAST / AutoDSE
  ACM TODAES Best Paper Award, 2022
  ☆26Updated last year
• pku-liang / TENET
  An analytical framework that models hardware dataflow of tensor applications on spatial architectures using the relation-centric notation…
  ☆86Updated last year
• ACADLab / SA-DS
  ☆12Updated last year
• SET-Scheduling-Project / GEMINI-HPCA2024
  Open-source Framework for HPCA2024 paper: Gemini: Mapping and Architecture Co-exploration for Large-scale DNN Chiplet Accelerators
  ☆89Updated 4 months ago
• DeepWok / mase
  Machine-Learning Accelerator System Exploration Tools
  ☆173Updated 2 months ago
• UCLA-VAST / GNN-DSE
  DAC'22 paper: "Automated Accelerator Optimization Aided by Graph Neural Networks"
  ☆40Updated last year
• arc-research-lab / SSR
  SSR: Spatial Sequential Hybrid Architecture for Latency Throughput Tradeoff in Transformer Acceleration (Full Paper Accepted in FPGA'24)
  ☆32Updated this week
• hkust-zhiyao / MasterRTL
  MasterRTL: A Pre-Synthesis PPA Estimation Framework for Any RTL Design
  ☆51Updated 3 months ago
• diwu1990 / UnarySim
  This is a general-purpose simulator for unary computing based on PyTorch, with the paper accepted to ISCA 2020 and awarded IEEE Micro Top…
  ☆44Updated last month
• UIUC-ChenLab / ScaleHLS-HIDA
  ☆57Updated 5 months ago
• mit-emze / cimloop
  ☆65Updated 2 weeks ago
• Accelergy-Project / micro22-sparseloop-artifact
  MICRO22 artifact evaluation for Sparseloop
  ☆44Updated 3 years ago
• witmemtech / CIM-Technical-Papers-Collection
  Computing in memory optimizes data handling by performing operations directly in memory, ideal for high-speed data processing needs. This…
  ☆24Updated 9 months ago