SymbioticEDA / MARLANNLinks
Multiply-Accumulate and Rectified-Linear Accelerator for Neural Networks
☆90Updated 6 years ago
Alternatives and similar repositories for MARLANN
Users that are interested in MARLANN are comparing it to the libraries listed below
Sorting:
- Xilinx Unisim Library in Verilog☆86Updated 5 years ago
- FPGA250 aboard the eFabless Caravel☆31Updated 4 years ago
- SpinalHDL Hardware Math Library☆93Updated last year
- ☆38Updated 3 years ago
- Python interface to FPGA interchange format☆41Updated 3 years ago
- Yet Another RISC-V Implementation☆98Updated last year
- Small SERV-based SoC primarily for OpenMPW tapeout☆48Updated 4 months ago
- FuseSoC standard core library☆147Updated 4 months ago
- Demo SoC for SiliconCompiler.☆61Updated 2 weeks ago
- SOFA (Skywater Opensource FPGAs) based on Skywater 130nm PDK and OpenFPGA☆142Updated 2 years ago
- tools to help make the most of the limited space we have on the Google sponsored Efabless shuttles☆36Updated 2 years ago
- Bitstream relocation and manipulation tool.☆47Updated 2 years ago
- Plugins for Yosys developed as part of the F4PGA project.☆83Updated last year
- Hamming ECC Encoder and Decoder to protect memories☆34Updated 8 months ago
- Facilitates building open source tools for working with hardware description languages (HDLs)☆65Updated 5 years ago
- Wishbone interconnect utilities☆42Updated 8 months ago
- FGPU is a soft GPU architecture general purpose computing☆60Updated 4 years ago
- Open-source CSI-2 receiver for Xilinx UltraScale parts☆37Updated 6 years ago
- ☆60Updated 4 years ago
- Mutation Cover with Yosys (MCY)☆88Updated last week
- SoftCPU/SoC engine-V☆55Updated 7 months ago
- OpenFPGA☆33Updated 7 years ago
- Riscy Processors - Open-Sourced RISC-V Processors☆73Updated 6 years ago
- A tool that converts SystemVerilog to Verilog. Uses Design Compiler, so it is 100% compatible.☆43Updated 2 years ago
- ☆63Updated 6 years ago
- Benchmarks for Yosys development☆24Updated 5 years ago
- Docker Development Environment for SpinalHDL☆20Updated last year
- ☆23Updated 5 months ago
- Featherweight RISC-V implementation☆53Updated 3 years ago
- ☆32Updated 2 years ago