Gm over Id methodology
☆37Jun 8, 2022Updated 3 years ago
Alternatives and similar repositories for Gm_over_Id_methodology
Users that are interested in Gm_over_Id_methodology are comparing it to the libraries listed below
Sorting:
- Files for Advanced Integrated Circuits☆36Mar 1, 2026Updated last week
- This repo contains introduction of gm/id method and its application to some OTA design examples.☆18Dec 5, 2023Updated 2 years ago
- repository for a bandgap voltage reference in SKY130 technology☆42Jan 20, 2023Updated 3 years ago
- This library is an attempt to make transistor sizing for Analog design less painful.☆22Jan 22, 2026Updated last month
- Primitives for GF180MCU provided by GlobalFoundries.☆12Jul 6, 2025Updated 8 months ago
- This is the repository of IPs of the group in USC who is developing Analog Mixed-signal Parameter Search Engine (AMPSE). You can download…☆25Mar 11, 2023Updated 2 years ago
- ☆18May 5, 2022Updated 3 years ago
- iverilog extension for Visual Studio Code to satisfy the needs for an easy testbench runner. Includes builtin GTKWave support.☆11Mar 4, 2023Updated 3 years ago
- Reinforcement learning assisted analog layout design flow.☆27Jun 17, 2024Updated last year
- An EDA tool for automatic device sizing using Gm/Id method.☆14Jan 10, 2026Updated last month
- Python script for generating lookup tables for the gm/ID design methodology and much more ...☆118Nov 21, 2025Updated 3 months ago
- This project discusses the design procedure of a Low Dropout Voltage Regulator (LDO) circuit.☆19Feb 28, 2024Updated 2 years ago
- This project shows how to model a 4-bit flash ADC and a 4-bit DAC using ideal components. Used vdc, vpulse, vcvs, switch, res, cap, vccs …☆18Apr 20, 2019Updated 6 years ago
- awesome-Analog-IC-Design-Automation☆47Apr 19, 2023Updated 2 years ago
- 12 bit SAR ADC IP in Skywater 130 nm PDK☆24May 30, 2024Updated last year
- Fully-differential asynchronous non-binary 12-bit SAR-ADC in SKY130, free to re-use under Apache-2.0 license☆51Mar 13, 2025Updated 11 months ago
- This repository in a walk through the entire process of PLL IC designing from the tools to the final tapeout.☆20Feb 16, 2022Updated 4 years ago
- This is the XDM netlist converter, used to convert PSPICE and HSPICE netists into Xyce format.☆22Feb 15, 2024Updated 2 years ago
- Python port of Prof. Boris Murmann's gm/ID Starter Kit☆55Jun 30, 2017Updated 8 years ago
- Ancillary Material for the book "Systematic Design of Analog CMOS Circuits"☆182Oct 6, 2025Updated 5 months ago
- Advanced Integrated Circuits 2024☆24Nov 16, 2024Updated last year
- A python3 gm/ID starter kit☆66Jan 26, 2026Updated last month
- ☆26Apr 24, 2021Updated 4 years ago
- ☆28Aug 11, 2024Updated last year
- Design of Analog Blocks in Skywaters 130nm meeting corners: different flavors of OTA, BandGap, LDO.☆30Jul 30, 2022Updated 3 years ago
- SPICE Netlist Datasets: https://symbench.github.io/spice-datasets/☆34Oct 10, 2023Updated 2 years ago
- Parametric layout generator for digital, analog and mixed-signal integrated circuits☆72Updated this week
- This project shows how to model a 10-bit pipeline ADC and a 10-bit DAC using ideal components. Used vdc, vpulse, vcvs, switch, res, cap, …☆36Apr 7, 2019Updated 6 years ago
- Python script to convert image files to GDSII files☆70Feb 14, 2025Updated last year
- MATLAB toolbox for interfacing with the Cadence Virtuoso IC Design System☆30Mar 21, 2017Updated 8 years ago
- ☆25Nov 7, 2024Updated last year
- Characterizer☆31Nov 19, 2025Updated 3 months ago
- {reference,survival} guide to bash scripting 🐚📖☆30Sep 20, 2024Updated last year
- A free standard cell library for SDDS-NCL circuits☆28Mar 3, 2023Updated 3 years ago
- ☆31Oct 12, 2023Updated 2 years ago
- Fully-differential asynchronous non-binary 12-bit SAR-ADC☆41Jun 13, 2023Updated 2 years ago
- ☆33Dec 16, 2021Updated 4 years ago
- IIC-OSIC-TOOLS is an all-in-one Docker image for SKY130/GF180/IHP130-based analog and digital chip design. AMD64 and ARM64 are natively s…☆790Updated this week
- Interchange formats for chip design.☆37Feb 15, 2026Updated 3 weeks ago