sfmth / OpenSpikeLinks
Fully opensource spiking neural network accelerator
☆163Updated 2 years ago
Alternatives and similar repositories for OpenSpike
Users that are interested in OpenSpike are comparing it to the libraries listed below
Sorting:
- tinyODIN digital spiking neural network (SNN) processor - HDL source code and documentation.☆75Updated 2 years ago
- ReckOn: A Spiking RNN Processor Enabling On-Chip Learning over Second-Long Timescales - HDL source code and documentation.☆92Updated 3 years ago
- ☆30Updated 3 years ago
- ODIN online-learning digital spiking neural network (SNN) processor - HDL source code and documentation.☆215Updated 6 years ago
- Notebooks and code for Neuromorphic Hardware Workshop at ISFPGA 2024.☆64Updated last year
- [FPL 2021] SyncNN: Evaluating and Accelerating Spiking Neural Networks on FPGAs.☆64Updated 4 years ago
- IEEE Transactions on Circuits and Systems I: Efficient FPGA Implementations of Pair and Triplet-based STDP for Neuromorphic Architectures☆27Updated 6 years ago
- Repository collecting papers about neuromorphic hardware, such as ASIC and FPGA implementations of SNNs and stuff.☆199Updated 2 years ago
- A project dedicated to developing a hardware Integrated Circuit (IC) for a Spike Neural Network (SNN), powered by the RTL code generated …☆63Updated last year
- A Spiking Neuron Network Project in Verilog Implementation☆25Updated 7 years ago
- Spiking Neural Network RTL Implementation☆64Updated 4 years ago
- ☆53Updated last year
- Verilog and Python drivers and APIs for Neurram 48-core chip☆43Updated 3 years ago
- HedgeHog Fused Spiking Neural Network Emulator/Compute Engine is a hardware implementation of a SNN designed for implementation in Xilinx…☆60Updated 9 months ago
- The CyNAPSE Neuromorphic Accelerator: A Digital Spiking neural network accelerator written in fully synthesizable verilog HDL☆36Updated 6 years ago
- ☆20Updated 3 years ago
- Hardware implementation of Spiking Neural Network on a PYNQ-Z1 board☆39Updated 6 years ago
- This repository includes the Resistive Random Access Memory (RRAM) Compiler which is designed in the context of the research project of D…☆76Updated 3 years ago
- ☆98Updated 5 years ago
- An Open Workflow to Build Custom SoCs and run Deep Models at the Edge☆101Updated 2 weeks ago
- A repository FPGA-friendly SNN models☆35Updated 4 years ago
- IC implementation of TPU☆143Updated 6 years ago
- This is a verilog implementation of 4x4 systolic array multiplier☆71Updated 5 years ago
- Spiking neural network implementation using Verilog with LIF (Leaky Integrate-and-Fire) neurons☆19Updated 5 years ago
- FPGA Design of a Spiking Neural Network.☆45Updated last year
- This project aims to be a collaborative effort to collect under one roof all the memristor models published to date.☆129Updated 6 years ago
- The project includes SRAM In Memory Computing Accelerator with updates in design/circuits submitted previously in MPW7, by IITD researche…☆16Updated 2 years ago
- From Pytorch model to C++ for Vitis HLS☆18Updated this week
- Notebooks for Hardware-Aware Training of Spiking Neural Networks. Open-Source Neuromorphic Circuit Design Tutorial at ESSCIRC 2023.☆24Updated 2 years ago
- FREE TPU V3plus for FPGA is the free version of a commercial AI processor (EEP-TPU) for Deep Learning EDGE Inference☆168Updated 2 years ago