Cognoscan / VerilogCogsLinks
Verilog Modules for DSP functions and other common tasks to make FPGA development easier and more fun.
☆20Updated 9 years ago
Alternatives and similar repositories for VerilogCogs
Users that are interested in VerilogCogs are comparing it to the libraries listed below
Sorting:
- A demonstration showing how several components can be compsed to build a simulated spectrogram☆45Updated last year
- FPGA IP cores for the Antikernel OS, intended to be included as a submodule in SoC integrations☆64Updated last week
- Wishbone controlled I2C controllers☆49Updated 6 months ago
- USB Full Speed PHY☆44Updated 5 years ago
- VHDL Library for implementing common DSP functionality.☆27Updated 6 years ago
- Extensible FPGA control platform☆62Updated 2 years ago
- 🔥 Technology-agnostic FPGA stress-test: maximum logic utilization and high dynamic power consumption.☆29Updated 2 years ago
- Sigma-Delta Analog to Digital Converter in FPGA (VHDL)☆16Updated 7 years ago
- Digital FM Radio Receiver for FPGA☆60Updated 9 years ago
- Time to Digital Converter (TDC)☆30Updated 4 years ago
- an inverter drawn in magic with makefile to simulate☆26Updated 2 years ago
- VHDL Modules☆24Updated 10 years ago
- ☆20Updated 2 years ago
- Fusesoc compatible rtl cores☆15Updated 2 years ago
- assorted library of utility cores for amaranth HDL☆90Updated 8 months ago
- Fully featured implementation of Inter-IC (I2C) bus master for FPGAs☆27Updated 5 years ago
- Wishbone to AXI bridge (VHDL)☆41Updated 5 years ago
- Digital systems are clocked. This project is about constructing a high-Q clock by simmering an ordinary quartz crystal in a heavy numeric…☆11Updated last week
- Small footprint and configurable JESD204B core☆42Updated last week
- tools to help make the most of the limited space we have on the Google sponsored Efabless shuttles☆36Updated 2 years ago
- Projects published on controlpaths.com and hackster.io☆40Updated 2 years ago
- ☆36Updated 8 months ago
- LiteX based FPGA gateware for Thunderscope.☆21Updated last week
- Library of reusable VHDL components☆28Updated last year
- ☆30Updated 4 years ago
- Using VexRiscv without installing Scala☆38Updated 3 years ago
- A collection of debugging busses developed and presented at zipcpu.com☆41Updated last year
- A reconfigurable logic circuit made of identical rotatable tiles.☆21Updated 3 years ago
- JESD204B core for Migen/MiSoC☆36Updated 4 years ago
- A comparison of 1st and 2nd order sigma delta DAC for FPGA☆56Updated 4 years ago