Alternatives and similar repositories for jtag_uart_example

Users that are interested in jtag_uart_example are comparing it to the libraries listed below

• tomverbeure / fpga_quick_ram_update
  Quickly update a bitstream with new RAM contents
  ☆15Updated 4 years ago
• lawrie / tiny_ram_soc
  Picorv32 SoC that uses only BRAM, not flash memory
  ☆13Updated 6 years ago
• gtjennings1 / HyperBUS
  A basic HyperRAM controller for Lattice iCE40 Ultraplus FPGAs
  ☆61Updated 6 years ago
• lawrie / ulx3s_examples
  Example Verilog code for Ulx3s
  ☆41Updated 3 years ago
• xobs / lxbuildenv
  Simplified environment for litex
  ☆14Updated 4 years ago
• lambdaconcept / lambdaUSB
  A configurable USB 2.0 device core
  ☆31Updated 5 years ago
• defparam / PCI2Nano-RTL
  An open source FPGA PCI core & 8250-Compatible PCI UART core
  ☆43Updated 4 years ago
• ZiyangYE / General-Slow-DDR3-Interface
  A general slow DDR3 interface. Very little resource consumption. Suits for all FPGAs with 1.5V IO voltage.
  ☆38Updated last year
• tmeissner / gatemate_experiments
  Experiments with Cologne Chip's GateMate FPGA architecture
  ☆15Updated last year
• micro-FPGA / CRUVI
  CRUVI Standard Specifications
  ☆19Updated last year
• nand2mario / ddr3-tang-primer-20k
  DDR3 controller for Tang Primer 20K (Gowin GW2A-18C fpga). DDR3-800 speed and low latency.
  ☆59Updated 2 years ago
• mattvenn / wishbone_buttons_leds
  simple wishbone client to read buttons and write leds
  ☆18Updated last year
• blackmesalabs / s7_mini_fpga
  Example designs for the Spartan7 "S7 Mini" FPGA board
  ☆28Updated 6 years ago
• no2fpga / no2muacm
  Drop In USB CDC ACM core for iCE40 FPGA
  ☆34Updated 3 years ago
• jevinskie / General-Slow-DDR3-Interface
  A general slow DDR3 interface. Very little resource consumption. Suits for all FPGAs with 1.5V IO voltage.
  ☆12Updated 2 years ago
• hdl-util / i2c
  Fully featured implementation of Inter-IC (I2C) bus master for FPGAs
  ☆29Updated 5 years ago
• GMM-7550 / gmm7550-hardware
  CologneChip GateMate FPGA Module: GMM-7550
  ☆22Updated 2 weeks ago
• YosysHQ / setup-oss-cad-suite
  Set up your GitHub Actions workflow with a OSS CAD Suite
  ☆16Updated last year
• lawrie / blackicemxbook
  ☆27Updated 5 years ago
• GuzTech / shdl6800
  shdl6800: A 6800 processor written in SpinalHDL
  ☆26Updated 5 years ago
• MJoergen / HyperRAM
  Portable HyperRAM controller
  ☆57Updated 8 months ago
• hansfbaier / colorlight-qmtech-adapter
  Adapter to use Colorlight i5/i9 FPGA boards in a QMTech board form factor
  ☆19Updated 3 years ago
• OLIMEX / GateMateA1-EVB
  Development board for GateMateA1 CCGM1A1 FPGA from Cologne Chip with PS2 VGA 64Mbit RAM RP2040
  ☆30Updated 8 months ago
• rob-ng15 / PAWS
  PLEASE MOVE TO PAWSv2
  ☆17Updated 3 years ago
• blackmesalabs / hyperram
  Portable Verilog RTL interface to S27KL0641DABHI020 64Mbit HyperRAM IC
  ☆91Updated 7 years ago
• kazkojima / colorlight-i5-tips
  Tiny tips for Colorlight i5 FPGA board
  ☆57Updated 4 years ago
• tomverbeure / ecp5_jtag
  Use ECP5 JTAG port to interact with user design
  ☆31Updated 4 years ago
• HarmonInstruments / verilog
  ☆20Updated 3 years ago
• Wren6991 / libfpga
  Reusable Verilog 2005 components for FPGA designs
  ☆46Updated 6 months ago
• m-labs / VexRiscv-verilog
  Using VexRiscv without installing Scala
  ☆38Updated 3 years ago