hugodiasg / asitic-example
☆11Updated last month
Related projects ⓘ
Alternatives and complementary repositories for asitic-example
- A python3 gm/ID starter kit☆39Updated 2 months ago
- Files associated with Digital Integrated Circuits (ecen4303) at Oklahoma State University☆9Updated 11 months ago
- Course material for a basic-level circuit design course using Xschem and ngspice☆17Updated this week
- An Amateur Radio Transceiver IC (2.4 / 5 / 10 GHz)☆70Updated 3 years ago
- Advanced integrated circuits 2023☆29Updated 8 months ago
- ☆69Updated 2 months ago
- This repository is for (pre-)release versions of the Revolution EDA.☆35Updated 2 weeks ago
- An example of analogue design using open source IC design tools☆29Updated 3 years ago
- JKU IIC OSIC-Multitool for open-source IC (OSIC) design for SKY130.☆56Updated this week
- Design of LDO using open source SKY130PDK☆9Updated 2 months ago
- submission repository for efabless mpw6 shuttle☆30Updated 10 months ago
- Files for Advanced Integrated Circuits☆26Updated 3 weeks ago
- How to correctly write a flicker-noise model for RF simulation.☆19Updated last year
- Circuit Automatic Characterization Engine☆45Updated last week
- Verilog-A simulation models☆53Updated last week
- PLL Designs on Skywater 130nm MPW☆20Updated 11 months ago
- Converts GDSII files to STL files.☆35Updated 11 months ago
- XSCHEM symbol libraries for the Google-Skywater 130nm process design kit.☆58Updated 3 weeks ago
- A set of rules and recommendations for analog and digital circuit designers.☆25Updated 2 weeks ago
- repository for a bandgap voltage reference in SKY130 technology☆34Updated last year
- Skywater 130nm Klayout Device Generators PDK☆29Updated 4 months ago
- Skywaters 130nm Klayout PDK☆19Updated last month
- components and examples for creating radio ICs using the open skywater 130nm PDK☆17Updated 3 years ago
- A simple MOSFET model with only 5-DC-parameters for circuit simulation☆39Updated 4 months ago
- Advanced Integrated Circuits 2024☆22Updated this week
- ☆29Updated 3 years ago
- Implementation and test of reusable sigma-delta A/D converters written in SystemVerilog on a MAX10 FPGA with minimal external components☆55Updated 2 years ago
- MOSIS MPW Test Data and SPICE Models Collections☆26Updated 4 years ago
- VHDL library of high abstraction level synthesizable mathematical functions for multiplication, division and sin/cos functionalities and …☆22Updated last week
- Online viewer of Xschem schematic files☆20Updated 4 months ago