falwat / code_repoLinks
My code repositry for common use.
☆23Updated 3 years ago
Alternatives and similar repositories for code_repo
Users that are interested in code_repo are comparing it to the libraries listed below
Sorting:
- The Design and Implementation of a Pulse Compression Filter on an FPGA.☆31Updated 4 years ago
- FPGA纯逻辑实现modbus通信☆22Updated 3 years ago
- Reed Solomon Encoder and Decoder Digital IP☆21Updated 5 years ago
- Code for paper entitled "Low Cost FPGA based Implementation of a DRFM System"☆30Updated 4 years ago
- Implementation of Wireless communication blocks such as FFT, OFDM receiver, Polar code decoder in a FPGA using Vivado HLS☆28Updated 4 years ago
- Partial Verilog implimentation of a WiMAX OFDM Phy☆19Updated 13 years ago
- IEEE 802.16 OFDM-based transceiver system☆28Updated 6 years ago
- Testbenches for HDL projects☆22Updated this week
- Xilinx FPGA, ADC344X, AD9252, 14x 12x Serdes, LVDS☆60Updated 3 years ago
- FIR implemention with Verilog☆50Updated 6 years ago
- A project demonstrate how to config ad9361 to TX mode☆11Updated 7 years ago
- Verilog实现OFDM基带☆44Updated 9 years ago
- ☆19Updated 4 years ago
- 通过SPI协议实现FPGA multiboot在线升级功能☆11Updated 7 years ago
- DSP with FPGAs 3. edition ISBN: 978-3-540-72612-8☆15Updated last month
- We made ISAC radar using Zedboard and AD9361, by receiving the transmitted chirp signals, calculating the autocorrelation and FFT to get …☆17Updated 11 months ago
- Gaussian noise generator Verilog IP core☆32Updated 2 years ago
- Verilog Forward Error Correction Archive: BOX-Muller for fast AWGN generation, Universal Demapper from BPSK to QAM-512, different Forward…☆78Updated 2 years ago
- The implementation of AD9371 on KC705☆20Updated 6 months ago
- Low Density Parity Check Decoder☆18Updated 9 years ago
- 通过调试ADRV9009和AD9371对jesd204b知识点作进一步学习和总结☆23Updated 6 years ago
- wifi☆12Updated 8 years ago
- 软件无线电,使用FPGA进行正交解调。☆22Updated 6 years ago
- minimal code to access ps DDR from PL☆21Updated 6 years ago
- FPGA Technology Exchange Group相关文件管理☆54Updated last month
- A project demonstrate how to config ad9361 to TX mode and how to transmit MSK☆61Updated 6 years ago
- Dual-Mode PSK Transceiver on SDR With FPGA☆48Updated last year
- DSP with FPGAs 4. edition ISBN: 978-3-642-45308-3☆71Updated last month
- IEEE 802.11 OFDM-based transceiver system☆40Updated 8 years ago
- LMS-Adaptive Filter implement using verilog and Matlab☆48Updated 9 years ago