microsoft / brainsmithLinks
Open-source AI acceleration on FPGA: from ONNX to RTL
☆47Updated last month
Alternatives and similar repositories for brainsmith
Users that are interested in brainsmith are comparing it to the libraries listed below
Sorting:
- Using e-graphs for logic synthesis (ICCAD'25)☆31Updated last week
- An MLIR dialect to enable the efficient acceleration of ML model on CGRAs.☆65Updated last year
- ☆62Updated 10 months ago
- A fast, accurate trace-based simulator for High-Level Synthesis.☆74Updated last month
- ☆17Updated 3 years ago
- A graph linear algebra overlay☆51Updated 2 years ago
- An FPGA accelerator for general-purpose Sparse-Matrix Dense-Matrix Multiplication (SpMM).☆92Updated last year
- High-Performance Sparse Linear Algebra on HBM-Equipped FPGAs Using HLS☆95Updated last year
- Processing in Memory Emulation☆23Updated 2 years ago
- A research shell for Alveo V80☆23Updated last month
- ☆36Updated 4 years ago
- An MLIR Complier for PyTorch/C/C++ Codes into HLS Dataflow Designs☆58Updated 6 months ago
- Dynamically Reconfigurable Architecture Template and Cycle-level Microarchitecture Simulator for Dataflow AcCelerators☆30Updated 2 years ago
- Multi-core HW accelerator mapping optimization framework for layer-fused ML workloads.☆64Updated 7 months ago
- EQueue Dialect☆42Updated 4 years ago
- Hop-Wise Graph Attention for Scalable and Generalizable Learning on Circuits☆35Updated last year
- AIM: Accelerating Arbitrary-precision Integer Multiplication on Heterogeneous Reconfigurable Computing Platform Versal ACAP (Full Paper a…☆24Updated 8 months ago
- A scheduler for spatial DNN accelerators that generate high-performance schedules in one shot using mixed integer programming (MIP)☆85Updated 2 years ago
- Artifact evaluation of PLDI'24 paper "Allo: A Programming Model for Composable Accelerator Design"☆33Updated last year
- A Spatial Accelerator Generation Framework for Tensor Algebra.☆61Updated 4 years ago
- A systolic array simulator for multi-cycle MACs and varying-byte words, with the paper accepted to HPCA 2022.☆84Updated 4 years ago
- ☆32Updated last year
- Implementations of Buffets, which are efficient, composable idioms for implementing Explicit Decoupled Data Orchestration.☆82Updated 6 years ago
- ☆42Updated 10 months ago
- Domain-Specific Architecture Generator 2☆22Updated 3 years ago
- ACM TODAES Best Paper Award, 2022☆32Updated 2 years ago
- CGRA framework with vectorization support.☆43Updated last week
- ☆42Updated last year
- dMazeRunner: Dataflow acceleration optimization infrastructure for coarse-grained programmable accelerators☆47Updated 3 years ago
- ☆17Updated 5 months ago