UCLA-VAST / TAPA-CSLinks
☆11Updated last year
Alternatives and similar repositories for TAPA-CS
Users that are interested in TAPA-CS are comparing it to the libraries listed below
Sorting:
- ☆71Updated 2 years ago
- A Scalable BFS Accelerator on FPGA-HBM Platform☆13Updated 3 years ago
- A research shell for Alveo V80☆13Updated last week
- An FPGA accelerator for general-purpose Sparse-Matrix Dense-Matrix Multiplication (SpMM).☆79Updated 10 months ago
- HLSFactory: A Framework Empowering High-Level Synthesis Datasets for Machine Learning and Beyond☆36Updated this week
- ☆11Updated 3 months ago
- QuickEst repository: Quick Estimation of Quality of Results☆26Updated 6 years ago
- AIM: Accelerating Arbitrary-precision Integer Multiplication on Heterogeneous Reconfigurable Computing Platform Versal ACAP (Full Paper a…☆22Updated 3 weeks ago
- ☆10Updated 2 years ago
- A Scalable BFS Accelerator on FPGA-HBM Platform☆14Updated last year
- ACM TODAES Best Paper Award, 2022☆25Updated last year
- [FPGA'21] Microbenchmarks for Demystifying the Memory System of Modern Datacenter FPGAs for Software Programmers☆31Updated 3 years ago
- An MLIR Complier for PyTorch/C/C++ Codes into HLS Dataflow Designs☆35Updated 2 weeks ago
- ☆44Updated last week
- [DATE 2022] PowerGear: Early-Stage Power Estimation in FPGA HLS via Heterogeneous Edge-Centric GNNs☆17Updated 3 years ago
- [FPGA 2024]FPGA Accelerator for Imbalanced SpMV using HLS☆12Updated 3 months ago
- A fast, accurate trace-based simulator for High-Level Synthesis.☆46Updated 2 months ago
- ☆24Updated 4 years ago
- SSR: Spatial Sequential Hybrid Architecture for Latency Throughput Tradeoff in Transformer Acceleration (Full Paper Accepted in FPGA'24)☆32Updated this week
- ☆16Updated 2 years ago
- [DAC 2020] Analysis and Optimization of the Implicit Broadcasts in FPGA HLS to Improve Maximum Frequency☆32Updated 4 years ago
- A graph linear algebra overlay☆51Updated 2 years ago
- NeuraLUT: Hiding Neural Network Density in Boolean Synthesizable Functions☆32Updated 2 months ago
- ☆41Updated 11 months ago
- Dataset for ML-guided Accelerator Design☆37Updated 6 months ago
- [FPGA 2024] Source code and bitstream for LevelST: Stream-based Accelerator for Sparse Triangular Solver☆12Updated last week
- Serpens is an HBM FPGA accelerator for SpMV☆19Updated 10 months ago
- ☆17Updated 8 months ago
- Implementation of Microscaling data formats in SystemVerilog.☆19Updated 9 months ago
- ☆29Updated 6 years ago