cucapra / latte21Links
Languages, Tools, and Techniques for Accelerator Design
☆33Updated 3 years ago
Alternatives and similar repositories for latte21
Users that are interested in latte21 are comparing it to the libraries listed below
Sorting:
- A Hardware Pipeline Description Language☆45Updated last year
- FPGA synthesis tool powered by program synthesis☆51Updated this week
- The Shang high-level synthesis framework☆120Updated 11 years ago
- ☆26Updated 2 years ago
- ☆103Updated 3 years ago
- Linear algebra accelerators for RISC-V (published in ICCD 17)☆66Updated 7 years ago
- A polyhedral compiler for hardware accelerators☆59Updated 11 months ago
- A Language for Closed-form High-level ARchitecture Modeling☆21Updated 5 years ago
- Chisel library for Unum Type-III Posit Arithmetic☆39Updated 3 months ago
- Verilog AST☆21Updated last year
- ☆40Updated 3 years ago
- Polyhedral High-Level Synthesis in MLIR☆33Updated 2 years ago
- Productive and portable performance programming across spatial architectures (FPGAs, etc.) and vector architectures (GPUs, etc.)☆31Updated last year
- ☆15Updated 4 years ago
- Patmos is a time-predictable VLIW processor, and the processor for the T-CREST project☆144Updated last month
- Lake is a framework for generating synthesizable memory modules from a high-level behavioral specification and widely-available memory ma…☆22Updated 3 weeks ago
- The PE for the second generation CGRA (garnet).☆17Updated 2 months ago
- Time-sensitive affine types for predictable hardware generation☆145Updated this week
- Floating point modules for CHISEL☆32Updated 10 years ago
- An LLVM pass to prove that an II works for the given loop for Vitis HLS☆11Updated 3 years ago
- A 32-bit RISC-V Processor Designed with High-Level Synthesis☆54Updated 5 years ago
- ☆24Updated 4 years ago
- Peak : Processor Specification Language ala Newell and Bell's ISP☆20Updated last year
- ☆56Updated 3 years ago
- TAPA is a dataflow HLS framework that features fast compilation, expressive programming model and generates high-frequency FPGA accelerat…☆19Updated 10 months ago
- ☆59Updated this week
- CIRCT-based HLS compilation flows, debugging, and cosimulation tools.☆49Updated last year
- Next generation CGRA generator☆112Updated last week
- C++ parsing library for simple formats used in logic synthesis and formal verification☆36Updated last year
- ILA Model Database☆23Updated 4 years ago