Alternatives and similar repositories for msgpack-vhdl

Users that are interested in msgpack-vhdl are comparing it to the libraries listed below

• FDU-ME-ARC / NVMeCHA
  ☆17Updated 4 years ago
• giuseppedongiovanni / nvme_comp_storage
  Computational Storage Device based on the open source project OpenSSD.
  ☆26Updated 4 years ago
• Viq111 / Vivado-CI
  A simple Vivado (Verilog & VHDL) Continuous Integration tool with seamless integration to Travis-CI
  ☆22Updated 10 years ago
• DUNE / pl-nvme
  ☆36Updated 5 years ago
• magro732 / OpenRIO
  Contains VHDL IP-blocks to create stand-alone RapidIO-endpoints, RapidIO-switches and RapidIO-switches with local endpoints.
  ☆32Updated 8 years ago
• mwrnd / innova2_experiments
  Works in Progress and Experiments for the Innova-2 Flex XCKU15P-based Board
  ☆17Updated last year
• fpgasystems / Centaur
  Centaur, a framework for hybrid CPU-FPGA databases
  ☆27Updated 8 years ago
• pbridd / lzrw1-compression-core
  This is the repository for a verilog implementation of a lzrw1 compression core
  ☆18Updated 7 years ago
• RSPwFPGAs / virtio-fpga-bridge
  Virtio front-end and back-end bridge, implemented with FPGA.
  ☆28Updated 5 years ago
• warclab / zycap
  Zynq PR Management
  ☆14Updated 9 years ago
• RSPwFPGAs / opae-xilinx
  OPAE porting to Xilinx FPGA devices.
  ☆39Updated 5 years ago
• mcrl / NVMe
  ☆32Updated last year
• riscveval / Rocket-Chip
  ☆26Updated 8 years ago
• RTSYork / unvme-zynq
  User Space NVMe Driver (modified for use on Zynq UltraScale+ MPSoC)
  ☆11Updated 7 years ago
• Cosmos-OpenSSD / Cosmos-OpenSSD
  ☆45Updated 7 years ago
• yu-zou / DirectNVM
  An open-source RTL NVMe controller IP for Xilinx FPGA.
  ☆56Updated 4 years ago
• RSPwFPGAs / qemu-hdl-cosim
  VM-HDL Co-Simulation for Servers with PCIe-Connected FPGAs
  ☆49Updated 4 years ago
• wtiandong / Hardware_circular_buffer_controller
  This is a circular buffer controller used in FPGA.
  ☆34Updated 9 years ago
• bgottschall / reloc
  Designing Relocatable FPGA Partitions with Vivado Design Suite
  ☆10Updated 7 years ago
• enjoy-digital / liteiclink
  Small footprint and configurable Inter-Chip communication cores
  ☆61Updated 2 months ago
• NetTLP / adapter
  An FPGA-based NetTLP adapter
  ☆26Updated 5 years ago
• scarv / scarv-cpu
  SCARV: a side-channel hardened RISC-V platform
  ☆27Updated 2 years ago
• lucasbrasilino / net2axis
  Verilog network module. Models network traffic from pcap to AXI-Stream
  ☆23Updated 4 years ago
• whutddk / Rift2Core
  Based on Chisel3, Rift2Core is a 9-stage, out-of-order, 64-bits RISC-V Core, which supports RV64GC.
  ☆40Updated last year
• d953i / Custom_Part_Data_Files
  Xilinx PCIe to MIG DDR4 example designs and custom part data files
  ☆39Updated last year
• fpgadeveloper / ethernet-fmc-zynq-gem
  Example design for the Ethernet FMC using the hard GEMs of the Zynq
  ☆57Updated 4 months ago
• fpgasystems / dma-driver
  ☆21Updated 6 years ago
• fpgasystems / erbium
  Business Rule Engine Hardware Accelerator
  ☆13Updated 5 years ago
• alexforencich / xfcp
  Extensible FPGA control platform
  ☆61Updated 2 years ago
• BBN-Q / PCIe-FPGA
  Linux kernel driver for memory mapped PCIe - FPGA communication.
  ☆86Updated 10 years ago